I am hoping someone can help solve what seems to be a fairly simple and common task. I have an I2C design that needs to be verified. Per all the training and documentation on Intel FPGAs/Avalon IP/etc, I think I should be able to create the testbench from the Platform Designer and use the Avalon BFMs to read/write to the DUT's I2C devices; however, I seem to be missing some basic steps. The design I am testing implements 2 slave devices that an external controller can communicate with. Those devices have the standard I2C SDA and SCL pins, which are part of the "conduit" interface from the Avalon MM Slave. Those are the only ports that I have to connect to (although I can easily create the output enables for each as well); therefore, the "Generate Testbench System" does not recognize them as an Avalon MM Slave. Is there some trick to getting the Testbench generator to recognize them as Avalon I2C devices? If I need to create the testbench manually, how do I configure the Avalon-MM Master BFM to give me the correct I2C signals for which to connect?
Hi, the below link helps to provide you more detail information on the Avalon testbench.
You can modify your testbench based on your design needs.
Thank you for following up. I have read the document that you linked above. The problem I am having is that the Platform Designer's testbench creation process does not recognize that the inputs I have on the DUT are actually I2C Avalon interfaces. I have tried to solve this by manually modifying the Component's interfaces, by creating a separate I2C design and then copying those BFMs that the tool places into my testbench, and many other variants of the same. In every attempt, the Avalon BFM requires additional connections that I simply don't have. It is my understanding that I can add a BFM (or two) and then use it to exercise the slave devices in my DUT, is that not correct?