Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.

Help in VHDl code

Altera_Forum
Honored Contributor II
1,334 Views

Please can any one review this code for me function of code " data taken from text file and stored in memory with random address created by using LFSR ,then i make some modification on this data and write it again to its location in the memory and I need to write the final contents of memory to another text file"problem " data which written to the text file completely different from that expected"is that problem in code syntax or may be in simulation process ? 

 

 

code ,  

http://www.alteraforum.com/forum/attachment.php?attachmentid=10780&stc=1&d=1435248115
0 Kudos
2 Replies
Altera_Forum
Honored Contributor II
578 Views

please repost with code tag and some end of line chars!

0 Kudos
Altera_Forum
Honored Contributor II
578 Views

wow, your code is quite difficult to read. It would be nice if you'd clean it up when you ask for some support. 

It seems you read lines in from a file and put then into an integer array: Integer is often default a 32-bit signed value. You then cast the integer value into an unsigned 8-bit bit-vector. Could it be that something already goes wrong with the type conversion? 

The code is missing the implementation of LFSR and Embedding_Module. 

Also: "endoffile" and "linenumber" seem unused.
0 Kudos
Reply