Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Hi, this is on stratix board MX. I am unable to generate HDL for esram block from platform designer. error details are given below. Anybody knows whats the wrong with this IP ?

anilinintel
Beginner
1,325 Views

Error: no such variable

   (read trace on "::env(IP_ROOTDIR)")

   invoked from within

"set ip_rootdir $::env(IP_ROOTDIR)"

   (procedure "::esram::utils::fileset::get_esram_path" line 2)

   invoked from within

"::esram::utils::fileset::get_esram_path"

   (procedure "generate_unique_files" line 8)

   invoked from within

"generate_unique_files $ip_name"

   (procedure "::esram::fileset::callback_quartus_synth" line 4)

   invoked from within

"::esram::fileset::callback_quartus_synth esram_exp_esram_0_esram_181_gi4d4cq"

Error: Generation stopped, 1 or more modules remaining

Error: qsys-generate failed with exit code 1: 2 Errors, 0 Warnings

 

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sstrell
Honored Contributor III
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Before generating, check the blue warning messages to see if there are any potential issues with any components or their parameter settings in the system. Other than that, it's hard to diagnose the problem from what you've posted.

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anilinintel
Beginner
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thanks for the reply. problem got fixed by setting up a environmental variable for IP_ROOTDIR to a $QUARTUS_DIR/ip path. but i dont know why i have to do this only when i introdruced esram IP. quartus running smoothly previously with all other IP's like pcie, emif, nios, msgdma, uart etc.,

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