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I've seen that some people complained about highlighting nets in Quartus's chip planner, and I am one of them.
https://community.intel.com/t5/Intel-Quartus-Prime-Software/Chip-planner-modern-art/m-p/1456082
Below is RTL Viewer. I want to see highlighted nets below on Chip Planner.
If I right-click nodes(u_leaf_4 or u_leaf_5 in the screenshot below), there is an option to
locate the node on Chip Planner. But when I select nets, there is no such option.
Does anyone know how to select routing in the RTL Viewer and check it in the Chip Planner?
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Hello,
Nope. You can leave the maximum slack limit blank.
You can report all timing paths by putting 0 at "Report number of paths", however this can be time consuming because there could be hundreds and thousands of timing paths. I would just put a large number until it starts reporting positive slack. You can also sort the paths by slack in the timing report by clicking "Slack" on the panel.
Regards,
Nurina
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Hello,
Thank you for using Intel Communities.
May I know which version of Quartus you are using and what is your target device?
Thanks,
Nurina
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Hello,
The reason you cannot highlight a route in chip planner from RTL viewer is because the RTL viewer is the synthesised RTL code you have written (Analysis & Synthesis stage). From there Quartus will perform place & route and also register retiming during the Fitter stage so the routes in the chip planner are entirely different from what you see in the RTL viewer. This is why you don't have the option to highlight route in Chip Planner from RTL viewer.
My suggestion is to cross probe from Timing Analyzer as you can locate path in Chip Planner from here. What you can do is report timing of the particular node you want to highlight in Chip Planner.
You can also do the report_timing on Timing Analyzer GUI. On Timing Analyzer, go to Reports>Timing Slack>Report Timing. In your targets, you can go to From and click on the 3 dots to open Node Finder and search for u_leaf_4.
From the report, you can right click on the path and locate in Chip Planner.
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Thanks for the information. I tried
Reports>Timing Slack>Report Timing
in Timing Analyzer.
And it seems like we can probe only that nets that fail in timing.. Is this correct?
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Hello,
Nope. You can leave the maximum slack limit blank.
You can report all timing paths by putting 0 at "Report number of paths", however this can be time consuming because there could be hundreds and thousands of timing paths. I would just put a large number until it starts reporting positive slack. You can also sort the paths by slack in the timing report by clicking "Slack" on the panel.
Regards,
Nurina
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Hi,
I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, please login to https://supporttickets.intel.com , view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
p/s: If any answer from community or Intel support are helpful, please feel free to mark as solution, give Kudos and rate 4/5 survey
Regards,
Nurina

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