How can I properly set the triggers/storage qualifiers in Signal Tap II so the data I see after it is run is from the initial trigger to the end of the sample depth that I specify?

[MHusz]

For context, I'm having trouble figuring out how to configure the Wolfson DAC with the I2C interface with my DE1-SoC. I'd like to see what my program is sending to the DAC via the I2C and where the communication is tripping up (I've already performed a static timing analysis which seems to work fine). I put the appropriate pre-synthesis signals in Signal Tap and trigger the start condition with a key on the SoC, but I've been attempting to manually stop the analyzer. By the time I'm able to hit the stop button, all the I2C lines are back into the idle state. I somehow had this configured before where signal tap would automatically stop taking data after the trigger had been initiated. But I'm not sure how I did it and now unless I hit stop it just keeps going.

thanks.

[sstrell]

I'm not sure what you are referring to by the "start condition" unless you are referring to the start/stop storage qualification. That is for just qualifying what data to store in the buffer, not to actually trigger, which may be why you are not getting the logic analyzer to trigger on its own. You can specify multiple trigger conditions and additional columns will appear in the Node List. With a standard sequential trigger, when the final trigger condition column occurs, the logic analyzer stops and captures data. You shouldn't have to manually stop the logic analyzer if you've set up the final trigger condition column to match what you're looking for. Perhaps posting a screenshot of your logic analyzer setup would help here.

[Rahul_S_Intel1]

Hi,

Kindly provide the screen shot of your signal tap and you can set the trigger condition on the signal tap window for example High , Low . In most cases by default it will be dont care, so requesting to change to expected value to triger.

Hope it helps.

Regards,

Rahul S