How do I get Quartus to import vhdl blocks into a bdf block?

[Altera_Forum]

I'm an old ASIC designer moving into the FPGA world, so I'm both a newbi and old hat. 

I'm trying to pull an existing VHDL block into a .bdf schematic block. I click block tool, add a block, name it to link to the vhdl block. When I click on it and do "Open design File" it shows me the correct VHDL block. But, the symbol doesn't have any of the IO's listed in the file. How do I get Quartus II to associate the IOs in the vhdl blosk with the symbol in the bdf block?

[Altera_Forum]

Open up the VHDL file  

Go to file -> create - > create schematic from design file (or something along those lines)  Then it will create a .bsf for your block that you can import into any bdf.  Be aware though - only basic types on IOs (std_logic, signed/unsigned, integer) are supported for conversion. Dont attempt it with record or non-standard array types.

[Altera_Forum]

Thank you. That did the first job for me. 

 But have a followup question  I have a table of I/O pins and the signals they are suppose to internally connect to. Is there a way to import this entire list (preferably in the .bdf file)? or do I need to add attributes to each verilog/VHDL signal identifying its pin location?

[Altera_Forum]

you use the assignments editor. From this you just assign the top level IO (in the BDF, not the VHDL) to a pin. You can find it in settings -> assignment editor (I think). I hope you find it pretty straightforward.