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15385 Discussions

How do i connect 2 different named buses please?

OldMarty
Beginner
296 Views

Hi All,

I have a problem trying to connect 2 different buses between megafunction devices within the schematic editor.

Here's my current problem, a megafunction lpm_counter has for example 4 output bits labelled as q[3..0] and i want to connect all 4 bits into an lpm_decoder that has 4 input bits labelled as d[3..0]

What is the correct procedure to make the 'q' bits connect to the corresponding 'd' bits?
I tried creating 2 buses, 1 named q[3..0] and the other named d[3..0], then joining them together, but i only get errors during compilation.
I'm trying to avoid having to draw a nodeline for each bit and join them between 'd' and 'q' nodes if possible.

I know i'm missing a simple step in-between, but it's been a long time since i used Quartus ;-(

0 Kudos
13 Replies
Nurina
Employee
280 Views

Can you post what the error message says?


Thanks,

Nurina


OldMarty
Beginner
274 Views
Nurina
Employee
280 Views

Can you also post a screenshot of your schematic design?


Thanks,

Nurina


OldMarty
Beginner
273 Views

Hi Nurina,

Here's the schematic of my connection between the 'q' bus and the 'data' bus bits. It looks so simple, but i think i need to re-define something.

I'm simply just trying to achieve the following simple connections:
q[3] to data[3]
q[2] to data[2]
q[1] to data[1]
q[0] to data[0]


NOTE: q[4] & q[5] aren't being used at the moment...
bus-error-schem.jpg

OldMarty
Beginner
272 Views

Was there a command to use multiple signals on the SAME bus?

Maybe something like q[5..0] , data[3..0] ???

Is there a comma or semi-colon etc needed to separate the groups of wire definitions on the SAME bus?

sstrell
Honored Contributor III
241 Views

You can't have more than one name on a bus.

Try naming the bus q[3..0].

OldMarty
Beginner
236 Views

Hi,

ok, i renamed the data[3..0] bus in my diagram to q[3..0] and it seems to compile correctly (no errors now).
I also had to rename the q[5..0] to q[3..0] to avoid bus width mismatch errors.

I then removed the 2 buses i was using, and simply created a single bus between the counter/decoder devices and named it q[3..0] and it still works correctly.

Just for giggles, i decided to rename the bus to fred[3..0] and it still compiles without errors! what the?

Hmmm, odd,  i didn't know a bus can basically be named as 'anything', i always thought i had to adhere to a d[n..0] or q[n..0] description as used on the devices being connected.

with thanks

Nurina
Employee
169 Views

Here's a guideline on naming a bus for your information:  https://www.intel.com/content/www/us/en/programmable/quartushelp/13.0/mergedProjects/design/ged/ged_...

 

Since you've solved your problem I'll put this case to a close pending. I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

 

Regards,
Nurina

PS: If you find any comment from the community or Intel Support to be helpful, feel free to give Kudos.

 

OldMarty
Beginner
158 Views

Hi Nurina,

Where does that bus guide come from? I can't see anything as informative as that in the user guide pages.

Thanks for the bus info, it helps a lot.

Nurina
Employee
156 Views

This is from the help web page. You can access this from Quartus, go to Help->Help Topics. This help page contains information on how to use bus, wire, buffer, etc. along with how to use Quartus tools. 

User guides mostly guide you on how to use the Quartus tools.

 

Regards,

Nurina

OldMarty
Beginner
152 Views

Sorry, but all these guides/help files DO NOT TEACH new users "HOW TO" achieve anything!

The guides just repeat themselves, and show where/how to find a menu option or feature, but there's nothing to show people how to do anything.

I don't know how Intel expect new students to learn how to use the software to create their own designs.

For example, WHERE does it show me how to place a line, bus or logic gate?

The OLD ALTERA books used to show everything from start to finish to educate new students, but it seems Intel just wants to lose the user inside a maze of confusing topics and links that don't tell us anything to learn.

Seriously! Intel needs to re-write these help files and do it properly!

No other software on the planet is this bad with help files & guides, why is Intel so bad at this?

OldMarty
Beginner
135 Views

Hi Nurina,

That link is a Quartus 13 guide and i can't seem to find that same page of "bus info" when i use the Quartus 20.1.1 built-in help system.
Does old (important) information keep getting removed from the help system?

 

Nurina
Employee
127 Views

Hi,

 

Thank you for your feedback, I will report this problem to our internal team so we can improve your experience.

 

Some information are harder to find/unavailable on the help system of later versions of Quartus because the ones from the older guides are still compatible to the current version. For now, it's best you refer to the Quartus 13 guide as they provide the information you seek.

 

Regards,

Nurina

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