How to assign I/O standard of a pin only used with "Signal Probe" debug tool?

[gyuunyuu]

I assigned internal signals to pins on the FPGA by using the Signal Probe debug tool. I then saved the changes which runs the fitter. The fitter failed to fit route the requested signal the requested pin. The error said that the signal pin is 3.3V but that the bank 5 voltage is 1.8V.

Only in the pin planner I created a new name and assigned it to the pin location where I want Signal Probe to route the signal. I the also set the I/O standard to same as other pins in the bank 5, bank 5 has EMIF pins.

I have following questions:

1. Why did Quartus assume that the I/O voltage is 3.3V when I did not specify any?
2. When I created a new name in the pin planner and set to the same pin as I wanted in Signal Probe, and set the I/O standard for this name to what it should be (1.8V as per error), Quartus still assumed that the pin must be 3.3V and fitter failed
3. How do I specify the I/O voltage for pins of the design that are only going to be used with the Signal Probe?

[YuanLi_S_Intel]

Hi Hassan,

Please find my response below:

1. 3.3V I/O Standard is the default setting. User are encouraged to change the I/O standard setting on assignment editor or pin planner.
2. & 3. Please assign I/O Standard on assignment editor or pin planner. After that, please recompile the design.

Thank You