I have a project with three revisions. All the revisions have the same top level design. Right now I am using the quartus_sh --flow compile command to compile them in series. Then I tried to run them in parallel as follows.
quartus_sh --flow compile top_level -c rev1 &
quartus_sh --flow compile top_level -c rev2 &
quartus_sh --flow compile top_level -c rev3 &
And two revisions fails with,
Error (23031): Evaluation of Tcl script /edascratch/ms_edatools/altera/q171/quartus/common/tcl/internal/qsh_flow.tcl unsuccessful
Is there a way to run them in parallel?
- FPGA Design Tools
You cannot run the same design with three different revisions in parallel. You may create an archive file and compile the design in three separate directories in parallel provided that you have enough license seat.