Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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How to generate .sdo file for gate level-simulation? I'm using Arria 10 dev kit

DeusMMJr
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MuhammadAr_U_Intel
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Hi, With reference to document, https://www.intel.com/content/www/us/en/programmable/documentation/gtt1529956823942.html#mwh1409960616365 Gate Level Timing simulation is supported only for a few devices and Arria10 is not one of them. Un-fortunately you cannot generate .sdo files for Arria10 device. Thanks, Arslan
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