The algorithm implementated by FPGA take much more time than the one by CPU.I have no idea how to optimized the kernel according to the report.In the kernel,main work is the calcultion of floating point multiplication and power.How to improve the performance of FPGA?Thanks a lot.
The structure transfers data between host and FPGA is :
typedef struct
{
double S;
double X;
double u;
double e_rt_p;
double e_rt_q;
int CP;
}struct_A
and the screen displays:
............
MMD INFO : Link currently operating at 8 GT/s.
MMD INFO : Link operating at Gen 3 with 8 lanes.
MMD INFO : Expected peak bandwidth = 8000 MB/s
............
Report is:
https://alteraforum.com/forum/attachment.php?attachmentid=14561&stc=1
