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How to reduce the use of RAM blocks?

Altera_Forum
Honored Contributor II
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Hi, 

 

After I compile my OpenCL FPGA code, the use of RAM(memory) bits is 40%, but the use of RAM(memory) blocks is 75%, how to reduce the use of memory blocks? 

 

Thanks!
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Altera_Forum
Honored Contributor II
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Decrease the number of accesses to your local memory buffers. You can also use the guidelines available in "Intel FPGA SDK for OpenCL Best Practices Guide, Section 7.4-7.5".

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