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Altera_Forum
Honored Contributor I
1,091 Views

How to resolve this error?

I was setting location assignment for a logic cell and register, however, QII reported below error. Can anyone help me about this? My object device is EP4CGX15BF14C8. 

 

 

Error (170065): Cannot split carry or cascade chain crossing 128 logic cells and starting on logic cell "CalibTDC1ch:inst3|tdc1ch_won:inst1|DelayLine128Top:u_DelayLine128Top|lpm_add_sub128bit:lpm_add_sub128bit_inst|lpm_add_sub:LPM_ADD_SUB_component|add_sub_0fk:auto_generated|pipeline_dffe[1]~128" into legal LABs
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3 Replies
Altera_Forum
Honored Contributor I
67 Views

Hi Jerry, 

 

I hope this may help you. 

Error in the below link due to problem in Quartus® II software version 11.1 SP2. 

https://www.altera.com/support/support-resources/knowledge-base/solutions/rd05022012_595.html 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
Altera_Forum
Honored Contributor I
67 Views

 

--- Quote Start ---  

Hi Jerry, 

 

I hope this may help you. 

Error in the below link due to problem in Quartus® II software version 11.1 SP2. 

https://www.altera.com/support/support-resources/knowledge-base/solutions/rd05022012_595.html 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation) 

--- Quote End ---  

 

 

Hi Shankar, 

 

I got this link before i posted here. I was using QII 13.0 + sp1. Anyway, thank you.
Altera_Forum
Honored Contributor I
67 Views

What is the location assignment exactly? Seems like resource restricted in the lab.

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