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Hi
Guys, i need ur help in Quartus(altera software for designing)... i want to know how to sign extend bit in quartus?? cause i have function that compare between 2 inputes(16bit) and if its less it will give(1) else(zero)... and then it will go the Mux so, i need to sign extend it from 1 bit to 16 bit... how??? what is the function(name of it) that do this operations??? thanks alot...Link Copied
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How are you doing your design: schematic, VHDL, verilog?
Why do you need to extend one bit to sixteen bits? From what you've described, your vector is either all ones or all zeroes.
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