How to simulate TDF with ModelSim Altera ?

Altera_Forum · ‎05-18-2010

Hi,

I'm trying to use ModelSim-Altera to simulate a design that contains TDF design files.

I have no problem simulating Verilog files with the ModelSim SW directly (not passing through QuartusII). using a behavioral test bench.

However, when TDF files are introduced, obviously ModelSim can't compile them.

so trying to compile my files in quartusII, but since the TB is not synthesizable, I get an error that the file contains no logic !

so, the question is:

How do I simulate in modelsim a behavioral testbench that contains a design with AHDL files ???

Thanks

Altera_Forum · ‎05-18-2010

ok. found the problem

I used "Compile and Synthesize" in QuartusII, instead of "Compile and Elaborate"

now things are working :)