How to write data in a file from FPGA

[MG007]

 Hello,

I am a beginner using Quartus and programming FPGA. I need to implement a binary search on FPGA and record the result of the search in a file (a 7 binary code each time). Below is the implementation I did using Quartus and it is synthesizable. 

I just need help on how to store the D_out, every time the data is ready (valid bit is high).

[MG007]

Yes, I meant 0xAA or any data. 

I was also guessing that the enable being one is the issue (just wanted to make sure I am not doing sth wrong), for this testing I used the switches on the FPGA for implementing the enable for transmit. 

I also wanted to know if there is any software I can use for reading the serial data in PC that I can put the recorded data in excel easily. This one I am using, Serial port monitor, shows the data in a table but does not save it in a table. it only can be saved as text. I need to save the received data like a table in excel. 

[_AK6DN_]

Excel can easily import data from text files using a .CSV (comma separated value) file format. For example:

1,123,456
2,789,345
3,000,123

 so just output a comma between data values on a line, and end a line with a LF character.

Just about any Windows terminal program allows you to capture the text from the serial link and save it to a file.

I happen to like an use a program called TeraTerm just because I've used it for like 25+ years.

But there are lots of other choices.

[RichardTanSY_Altera]

Thank you for the quick and helpful suggestions from the community!

Hi @MG007,

 Do you need further help in regards to this case?

Best Regards,

Richard Tan

p/s: If you find any answers from the community or Intel Support to be helpful, we encourage you to mark them as the best answer or rate them 4/5 in the survey.

[RichardTanSY_Altera]

We noticed that we haven't received a response from you regarding the latest previous question/reply/answer, and will now transitioning your inquiry to our community support. 

We apologize for any inconvenience this may cause and we appreciate your understanding.

If you have any further questions or concerns, please don't hesitate to let us know. 

Thank you for reaching out to us!

Best Regards,

Richard Tan

p/s: If you find any answers from the community or Intel Support to be helpful, we encourage you to mark them as the best answer or rate them 4/5 in the survey. 

[michaelaskew]

module BinarySearch (
input logic clk,
input logic [6:0] target,
input logic valid,
output logic [6:0] D_out
);

reg [6:0] result;
integer file_out;

initial file_out = $fopen("output.txt", "w");

always_ff @(posedge clk) begin
if (valid) begin
result <= D_out;
$fwrite(file_out, "%b\n", result);
end
end

endmodule

This shortened version retains the essential components for storing D_out when valid is high and writes the result to a file during simulation. Adjust the file path and name as needed.

Regards
Menupro

[_AK6DN_]

The above code snippet will ONLY work within a logic simulation environment.

System tasks like $fopen() $fwrite() $fread() $fclose() etc are not supported in synthesis and on real hardware.

Which was the question the original poster had: saving data from an FPGA design on a physical development board.

[billmax]

If it were me I would use SignalTap with appropriately selected conditional storage qualifiers, then export the data / create signaltap list file.