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I am new to FPGA design using IP cores. I am trying to simulate an IP core design example. Per the user guide, I need to run a tb_run.do script which in turn calls msim_setup.tcl script. I am wondering if I need to add in all the source files in the various sub directories of the IP core? Initially I thought the simulation script takes care of it, but I don't see that happening. What is the correct procedure?
Thanks,
Lakshmi
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Hi,
Yes, simulation script will take care about the files required.
- Which user guide you have followed can you share the link.
- Which Quartus (version and edition) & modelsim version are you using.
- Attache the error message or modelsim transcript.
Best Regards,
Anand Raj Shankar
(This message was posted on behalf of Intel Corporation)
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Hi,
Thanks for your reply. I am using UG-20016 and trying to run simulation for the Intel 10G MAC design example. I am using Quartus v18.0 with update 1. The error I get "design not included". I am running tb_run.tcl as suggested in the user guide.
Also, I am always getting a page unresponsive, long script message on this forum page since last two days.
Thanks,
Lakshmi
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Hi Lakshmi,
I have used Quartus 18.0 pro Modelsim version 10.6c.
https://www.intel.com/content/dam/altera-www/global/en_US/pdfs/literature/ug/ug-20016.pdf
- Generated an example design for (Low Latency Ethernet 10G MAC Intel FPGA IP).
- We have recreated the scenario.
vsim -c -do tb_run.tcl
# No design specified
Let me check and com back on this.
Best Regards,
Anand Raj Shankar
(This message was posted on behalf of Intel Corporation)
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Hi Lakshmi,
vsim -c -do tb_run.tcl mentioned in UG-20016 is meant to be run from Windows/Linux command prompt and not Modelsim command promp.
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Yes, I finally realized that and we have it working for us. I just couldn't post here earlier as the forum page had some issues. I don't understand why the Windows command prompt command was provided when it cannot open any waveform or signal window. Anyways we have it working fine from Modelsim now.
Thanks,
Lakshmi
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