In-System updating of a ROM synthesized (inferred) from Verilog code

Anton_Babushkin · ‎12-10-2019

Hi guys,

In my present project I need to have an ability of In-System updating of a ROM synthesized (inferred) from Verilog code.

In my code the ROM is inferred acc to recommendations described in the 13. Recommended HDL Coding Styles document on page 13.

I've also consulted with 16. In-System Updating of Memory and Constants document, which claims that it's possible to perform a in-system update of on-chip memory using In-System Memory Content Editor tool for the memories that have In-System Updating feature enabled.

I do understand that this feature can be enabled for megafunctions during their configuration.

However what is not clear to me is how to enable a In-System Updating feature for synthesized (inferred) memory from Verilog (or VHDL) code.

Is there some kind of pragma I should add to the code?

Could you please suggest me how to achive In-System updating of a ROM synthesized (inferred) from Verilog code.

Thanks.

Best regards,

Anton

ShafiqY_Intel · ‎12-30-2019

Hi Anton.Babushkin,

May I know the status of this issue?

If you have any solution, you may share it to our community here.

Thanks