Insert a VHDL module with SOPC Builder

[Altera_Forum]

Hi 

 I'm extremely new in VHDL design. I want to Insert a VHDL block of mine in SOPC Builder, using "Create new component..." wizard.  I succesfully load my block.vhd, but then when I try to define signals & interfaces I can't "clean" errors or warnings.  Some examples:  AVALON_MM_SLAVE: Signal "SIGNAL" of type byteenable and width 1 must have width of 2, 4...   Where can I change this width?  AVALON_MM_SLAVE: Slave has dataavailable signal but cannot read.   ?????  I would appreciate some help with this  thank you

[Altera_Forum]

Take a look at sopc user guide section 6-4...

[Altera_Forum]

For the first error, your byteenable signal should be a vector, not a std_logic, and have a width compatible with your data bus size. 

For the second one, if you have a dataavailable input on your component, you also need a read output. This signal isn't useful if you don't intend to read! You should start by reading the avalon specification (http://www.altera.com/literature/manual/mnl_avalon_spec.pdf) to understand how those signals are used.

[Altera_Forum]

Thank you both, I'm reading the PDFs...