Intel Quartus Prime(Lite Edition) unable to compile code

[areebTAG]

Hi,

I am trying to compile& simulate VHDL code for a multibit adder along with its testbench. The code is tested in Questasim and it works fine however Questasim is giving errors which I can't quite figure out how to fix them. 

If anyone knows how to fix these, that would really help. 

My code and screenshots of the error is attached in this question. 

[sstrell]

Those aren't errors, only warnings, so they should not prevent compilation in Quartus.

Your design is purely combinatorial, so that's why there's a warning about no clocks.

I don't know how you have your Quartus hierarchy set up, but you do not compile a testbench in Quartus.  That's only for simulation, so don't include the tb file in your Quartus project.

[areebTAG]

so what about if you wanted to simulate you code first using Questasim? Intel Quartus does the option for running a rtl simulation, correct?

[sstrell]

Quartus can generate script files so you can simulate in Questasim.  It doesn't do a simulation compilation.

[ShengN_Intel]

May I know any update?

[areebTAG]

yes its fixed by doing the pin planner

[ShengN_Intel]

Hi,

Glad to hear that your issue has been resolved.
I'll now transition this thread to community support.
If you have a new question, feel free to open a new thread to get the support from Intel experts.

Thank you.

Best regards,
Sheng