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Io channel conflicts with global/local memory?

Altera_Forum
Honored Contributor II
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Hi everyone, 

When reading data from the fpga pin using the io channel, we find that the read data cannot be passed back to the HOST from the Device (FPGA).And as shown below, the compiler will display a warning when compiling.https://alteraforum.com/forum/attachment.php?attachmentid=15360&stc=1  

In the OpenCL framework, does the io channel conflict with global/local memory? 

Guys please suggest some solution. 

 

Thanks in advance.
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Altera_Forum
Honored Contributor II
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I/O channels do not have a stalling mechanism. Hence, if you have other stallable operations in your kernel, like stallable memory or on-chip channel operations, then stalls from these operations can propagate to the the I/O channel (which cannot be stalled) and hence, you will loose data. The obvious example of this is if you are reading from a network channel and writing into global memory; if the global memory operations is stalled due to contention, then the next data from the I/O channel will not be read and will be dropped. The only solution is if you implement a protocol on top of the I/O channel with a handshaking mechanism that ensures all dropped data is retransmitted.

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Altera_Forum
Honored Contributor II
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Hi, 

 

Thank you for the reply.My understanding of this warning is that global memory will interrupt the transfer of the io channel, causing data to be unreadable from the fpga external interface.However, the problem we are currently experiencing is that the data read from the kernel using the io channel cannot be returned to the host. 

We verify the correctness of the data read from the io channel as follows: 

Use io channel to read data from fpga's io into the kernel. Then perform a simple addition operation in the kernel and pass the data to the fpga external led through the io channel. By observing the 8-bit led, we find that the 8-bit led expresses the data from the kernel in binary form.However, this data cannot be passed back from kernel to host.In particular, if we use the io channel, even if the data is manually assigned in the kernel, this data cannot be passed back from the kernel to host.So can you give me some advice on this issue? 

 

Thanks in advance for any advice.
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Altera_Forum
Honored Contributor II
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Please describe what you mean by "cannot be passed back from kernel to host"? What happens when you write data from kernel to on-board memory and then transfer it to host memory? You are not trying to transfer data from the FPGA external memory to the host in the middle of kernel execution, are you? 

 

Also please elaborate what board you are using and how you are accessing LEDs and I/O. Have you created a custom BSP? I don't know of any OpenCL BSP that supports on-board LEDs. Furthermore, very few manufacturers provide support for network channels in their OpenCL BSP and even that requires a very expensive license for Altera's low-latency MAC core.
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