Is there a '-j8' option support while compiling the kernel?

[Altera_Forum]

Hi, 

 I just tried to use OpenCL SDK to compile some example kernels for Cyclone V Soc. And it is extremely slow.  But when i check the CPUs in system monitor, only one CPU is 100%, the others are almost idle. Is there anyway to use "-j8" or "-j4" like compile a Makefile?   I checked the docs and didn't find any clue.  Thanks. Shaodong

[Altera_Forum]

--- Quote Start ---  Hi,  I just tried to use OpenCL SDK to compile some example kernels for Cyclone V Soc. And it is extremely slow.  But when i check the CPUs in system monitor, only one CPU is 100%, the others are almost idle. Is there anyway to use "-j8" or "-j4" like compile a Makefile?   I checked the docs and didn't find any clue.  Thanks. Shaodong  --- Quote End ---    No, there is no "-j" type parallel compilation option.  When you do "aoc foo.cl", the compilation consists of two stages: 1) OpenCL to Verilog compilation, 2) Verilog to FPGA bitstream compilation using Quartus.  If you do "aoc -v", you will see the stage the compiler is on. The first stage is not multi-threaded, but the second stage (i.e.Quartus) should be using some multi-threaded support (you may want to look in Quartus forum).   If the first stage is taking very long time ( e.g. more than > 30 min or so), this may point to some bad OpenCL code, or a bug in the compiler.   The second stage (i.e.Quartus) may take couple of hours. Generally, the bigger your design is the longer this compilation will take.  Another thing, you should look at the resource usage estimates of your design. If it is very large (more than > %100), your design may not fit anyways. In this case, it is better to change the code to reduce the resource usage.

[Altera_Forum]

--- Quote Start ---  No, there is no "-j" type parallel compilation option.  When you do "aoc foo.cl", the compilation consists of two stages: 1) OpenCL to Verilog compilation, 2) Verilog to FPGA bitstream compilation using Quartus.  If you do "aoc -v", you will see the stage the compiler is on. The first stage is not multi-threaded, but the second stage (i.e.Quartus) should be using some multi-threaded support (you may want to look in Quartus forum).   If the first stage is taking very long time ( e.g. more than > 30 min or so), this may point to some bad OpenCL code, or a bug in the compiler.   The second stage (i.e.Quartus) may take couple of hours. Generally, the bigger your design is the longer this compilation will take.  Another thing, you should look at the resource usage estimates of your design. If it is very large (more than > %100), your design may not fit anyways. In this case, it is better to change the code to reduce the resource usage.  --- Quote End ---    Thanks for your reply.  For me, the first stage takes more than 2 hours. After some simple test, it seems the kernel was to big for Soc since the resources on cyclone V soc is relatively smaller.  Then I should really check how to optimise my kernel. Thanks