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Hello,
I'd like to program my flash using a .pof file and the parallel flash loader as described here in the application note : AN478 This is working, and I'd like to do the same in command line (only the programmer part). By the way, is it possible to see what is executed in quartus gui ? My tries with quartus_pgm are ok but I don't manage to "attach flash device" with my .pof file ... I also did some experiments with nios flash programmer but it only accepts sof file and I need to use my .pof file which is encrypted ! Thanks for your help!Link Copied
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Even though I haven't used quartus_pgm with the PFL there should be no difference from doing regular programming. Have you tried to save the CDF file from the quartus_pgmw GUI? Just save the CDF file as jtag_pfl.cdf (or similar). Then you should be able to do:
quartus_pgm -c "USB-BlasterII on 192.168.1.115 " jtag_pfl.cdf
Replace the cable argument with whatever cable you are using. Also, I prefer to replace the absolute path with a relative path in the CDF file. This way I can check out from git, build, and program anywhere.
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Thanks for the answer! That's what I needed.
But now, I'm experiencing another problem! I can't program flash anymore and can't figure out why ! I used to be able to program flash using the PFL megafunction or using flash programmer provided in the kit. This programmer uses Nios-flash-programmer. But now, I'm facing 2 problems : - With the PFL: I'm getting the error "can't recognize silicon id for device 1". I checked the IOs which are supposed to be bidir ... Everything seems ok and I'm using the same pfl.sof, so it should work - With the nios-flash-programmer : I'm obtaining the error : no cfi table found at address 0x08000000 when i'm trying to load a sof in the flash or when i'm trying to erase the flash. I'm kink of stuck with this flash ! Would someone would have hints of what I should check !? Thanks !- Mark as New
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What does jtagconfig return for device 1?
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Hi petter !
Thanks for your help ! jtagconfig.exe returns: 1) USB-Blaster [USB-1] 024090DD EP4GX230(.|ES) and jtagconfig.exe -n 1) USB-Blaster [USB-1] 024090DD EP4GX230(.|ES) Node 40286E00 Parallel Flash loader# 0 Is it Ok ? Should there be a max II in the chain ? I'm a bit lost with this problem ... Thanks for your help- Mark as New
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If this is a Stratix IV GX devkit I would expect:
1) USB-Blaster
024090DD EP4SGX230(.|ES)
020A40DD 5M(1270ZF324|2210Z)/EPM2210
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Hi !
Thanks for your answer ! This is a stratix IV GX devkit (TR4 from Terasic). So why I don't get the expected output ? Regards.- Mark as New
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I don't know the TR4, but if it has a MAX in the JTAG chain I would expect to see it. Do you have access to a different programming cable you could test?
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We did solder a 2x5 pins on the JTAG connector as described in the user manual.
I have 2 old cables ByteBlasterMV and ByteBlasterII, but quartus can't find any JTAG chain through this connector ... That seems I have a serious trouble. The User manual shows a MAXII in the Jtag chain which I don't see with my USB blaster !- Mark as New
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Again, I don't know the TR4. But it sounds like you have issues with your JTAG connection. You could check the schematics for your board and see if you can see TCK running through the chain when you program or run some other pattern (get device id or similar), you can then check the TDI/TDO if they are toggeling. If they do you might want to check if they are correct. There might also be DIP switches which will include/exclude parts from the JTAG chain. This might be a reason why you don't see the MAX.
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Hi Petter!
Thanks for your feedback ! Yes there are DIP swithches and a jumper to modify the JTAG chain. I did check those elements and they did not change! The JTAG seems to work because I'm able to load a .SOF in the stratix IV. The problem appears when I'm attempting to access the Flash. Is there a persistent (which are not reset at power off) mechanism for driving the Flash ?- Mark as New
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I had a similar problem. Check that the Flash reset pin is not resetting the flash memory device.
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Thanks for your help bill-now.
What do you mean by "flash reset pin" ? The pin in my Parallel Flash Loader (PFL) design ? or on the board ?- Mark as New
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I meant the pin on the Flash memory device. In my case this pin was controlled by the PFL and laso a microprocessor that used the Flash as its program memory after the PFL configured the FPGA.

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