MegaFunc. DDR2 High performance Controler issue

[Altera_Forum]

hi everybody, 

I am using example driver generated by mega wizard and altera ddr2 controller(with phy, No-AFI interface) as example to do a test. memory clock speed is 200MHz. I met with a very strange issue: the generated SOF can't work with Crucial DDR2 SODIMM, CT12864AC667, which is 64 bit width , 1G bytes capacity , with the help of signaltap, i found that PHY never return read data valid to controller read request.  But it can works well other two Crucial SODIMM, CT6464AC667(512M bytes capacity) , CT12864AC800(1G bytes). I checked timing parameter , looks like all parameter in the range of JEDEC requirement .   Could anyone give me some hints? thanks alot xyzxyk

[Altera_Forum]

I am really confused. CT6464A667 should have the same timing parameter as CT12864AC667, why doesn't CT12864AC667 work, but CT6464AC667 works. 

   --- Quote Start ---  hi everybody, I am using example driver generated by mega wizard and altera ddr2 controller(with phy, No-AFI interface) as example to do a test. memory clock speed is 200MHz. I met with a very strange issue: the generated SOF can't work with Crucial DDR2 SODIMM, CT12864AC667, which is 64 bit width , 1G bytes capacity , with the help of signaltap, i found that PHY never return read data valid to controller read request. But it can works well other two Crucial SODIMM, CT6464AC667(512M bytes capacity) , CT12864AC800(1G bytes). I checked timing parameter , looks like all parameter in the range of JEDEC requirement .   Could anyone give me some hints? thanks alot xyzxyk  --- Quote End ---  

[Altera_Forum]

with the help of oscilloscope, I found that CT12864AC667 doesn't reply DQS to read command..... 

  --- Quote Start ---  I am really confused. CT6464A667 should have the same timing parameter as CT12864AC667, why doesn't CT12864AC667 work, but CT6464AC667 works.  --- Quote End ---