Intel® Quartus® Prime Software
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Model Sim ALtera simulation result for FIR compiler problem

Altera_Forum
Honored Contributor II
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Hi, All, 

 

I am a rookie to altera software. I just generated MegaCore function FIR compiler, so is the generated IP core my own filter now? 

 

If so, in the step of "parameterize", I left everything as default, hence I believe I have created a low pass filter, right? 

 

Next, I simulated this fir_comp.vhd using the auto-generated testbench tb_fir_comp.vhd. Then I obtained the waveform as attached. It seems that there is no output at all. ast_sink_data is the input and they are all there, but ask_source_valid (this is the output and it is asserted by the FIR filter when there is valid data to output)is always undefined; also the "ast_source_data" is also always undefined? 

 

Can anyone suggest on what to do? Should i modify the testbench or somewhere else? 

 

I appreciate any suggestion! 

 

regards
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