Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Modelsim exits with code 9

Altera_Forum
Honored Contributor II
2,955 Views

Hi 

 

I have been try top simulate my design using modelsim. I get no warnings when the simulation starts but after a while I see the following in my terminal: 

 

Fatal: (vsim-4) ****** Memory allocation failure. ***** 

Attempting to allocate 131072 bytes 

Please check your system for available memory and swap space. 

** Fatal: vsimk is exiting with code 9. 

 

I understand that it might be because the design is pretty big. But is there a way to circumvent this and simulate my design? How do I proceed? :(:( I really need the simulation to complete my project.  

 

Kindly respond 

 

 

Thanks 

sudheera
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Altera_Forum
Honored Contributor II
1,422 Views

What platform are you running the simulation on (hardware and software)?

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Altera_Forum
Honored Contributor II
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I am running it on modelsim ase. I do the analysis and synthesis of the RTL design (verilog HDL) on Quartus Prime software. Hope this answers the question.

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Altera_Forum
Honored Contributor II
1,422 Views

Not even close. Let's try this again: 

 

What operating system are you using? Windows XP, 7, 8, or 10? 32bit or 64bit? Or version of Linux (use 'uname -a')? 

 

What hardware platform are you using? I'm guessing an Intel PC, but how much physical memory does it have? 

 

What version of Quartus are you using? What version of ModelSim?
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Altera_Forum
Honored Contributor II
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It means your machine does not have enough ram (and virtual ram) to complete the simulation.  

Do you have some large arrays in the design? Are you modelling DDR or something?
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