I have generated the ROM IP from intel quartus prime standard tool 18.1. I tried simulating the design by writing simple testbench. I have also compiled the altera_mf.v and 220model.v lib files .
But I am getting below error:
* Error: (vsim-3033) C:/altera/16.0/files/sss_nid1_0_rom_1port_181_zvidbsa.v(40): Instantiation of 'altera_syncram' failed. The design unit was not found.
# Time: 0 ps Iteration: 0 Instance: /rom_check_tb/u1/rom_1port_0 File: C:/altera/16.0/files/sss_nid1_0_rom_1port_181_zvidbsa.v
I have attached the files used for modelsim simulation . Please guide me which library files to attach and tell me where I am going wrong.
Since you are using the Quartus Standard version, we have a feature called Nativelink Simulation. All the library preparation and run commands are generated automatically by Quartus software without requiring your input. Do note that this feature is only available in Quartus Standard and Lite, Not in Pro version.
You may checkout the webpage below on how to use the feature:
I able to run the simulation using the files you attached, of course using nativelink.
Below is one of the script run and it indicated which library is used for your design.
vsim -t 1ps -L altera_ver -L lpm_ver -L sgate_ver -L altera_mf_ver -L altera_lnsim_ver -L twentynm_ver -L twentynm_hssi_ver -L twentynm_hip_ver -L rtl_work -L work -voptargs="+acc" rom_check_tb
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