Community
cancel
Showing results for 
Search instead for 
Did you mean: 
Altera_Forum
Honored Contributor I
883 Views

Multiple builds of the same design has different timing closure results

Hi,  

 

I ve been working on a project, which had some difficulty in timing closure. Among the other tool options, i learned to use SEED_VALUE, to start the synthesis and route options with a seed value.  

 

So my question is that, with the design codes remaining the same, and kept in three different folders and built, Could the timing closure be different, provided the SEED_VALUE is same in all the cases?.  

 

 

References: 

1) Script based Build  

2)Same design build on folders /home/fold1, /home/fold2, /home/fold3, and has negslacks Nill, -0.542 and -0.100 respectively 

3) The list of constraints used are attached along 

 

What could be the reason for different timing closure results seen across the 3 different builds?.
0 Kudos
3 Replies
Altera_Forum
Honored Contributor I
48 Views

Are they 100% the same? If there is so much as a different name on a wire, you will get different results. I tried to explain why in the following: 

http://www.alterawiki.com/wiki/the_quartus_ii_fitter_and_seed_sweeps 

Also, there can be IP that changes, specifically an ID IP in QSYS. (I can't remember the name off the top of my head). But something like that changes based on the time you compile, so all results are always different.
Altera_Forum
Honored Contributor I
48 Views

 

--- Quote Start ---  

Are they 100% the same? If there is so much as a different name on a wire, you will get different results. I tried to explain why in the following: 

http://www.alterawiki.com/wiki/the_quartus_ii_fitter_and_seed_sweeps 

Also, there can be IP that changes, specifically an ID IP in QSYS. (I can't remember the name off the top of my head). But something like that changes based on the time you compile, so all results are always different. 

--- Quote End ---  

 

 

Thanks Rysc, for your quick reply. Yes we are using licensed IP cores from altera for our project namely, Triple Speed Ethernet Megafunction, and NIOS-II cores. Is there anything that could be done to get consistent builds for the same design in such a case?. 

 

 

Regards 

Jeebu Jacob Thomas
Altera_Forum
Honored Contributor I
48 Views

Neither of those would cause it to change.  

Why do you want to recreate it? The main cases I've heard are: 

- If you have a golden build that is sent out to the field, you want to be able to regenerate it. I completely get this, but recommend saving everything about the project, including /db and /incremental_db, so you can just open it up without recompiling. Memory is generally pretty cheap, and there is no risk of "can I recreate this".  

- Different people compiling and getting the same results. I'm not sure on this one, as generally I would prefer to see what the seed variation is. If I really need to look at the other person's results, I can just get their .sof and download it, or open their reports or whatever. 

- Just the feel good of repeatability. I completely get this, and again, there is no random number generator in Quartus so it should get the same results(and I have seen it do it often), but I usually find there isn't a huge reason why it's necessary. (The biggest one is when someone has a bug that only shows up on certain builds, and Intel is trying to recreate it on their end without having the whole /db sent over) 

That's not actually answering your problem, but maybe I can help another way. (FYI, different operating systems, like Linux vs. Windows, will give different results. You're compiling on the same machine so that's not it, but I've seen that catch people)
Reply