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Device is Cyclone 10 GX, Quartus Prime Pro 19.3.
I'm trying to generate an IBIS file so I can do some board sim in HyperLynx. The netlist generator is complaining of unlicensed encrypted file, but I can't figure out what encrypted file is being included in the design. A typical error looks like this:
- Error (204009): Can't generate netlist output files because the license for encrypted file "C:/<private_details_deleted>/root_partition/19.3.0/planned/1/netlist.model Vendor: Intel FPGA QDB (6a81) Product: (bcec)" is not available"
During compilation I get this message:
The problem is... Although I am using the Altera HDMI receiver IP core, I have stubbed out the one encrypted IP component that's in there. It is not in the build. How can I figure out what file is triggering that message?
I went so far as to search through my source tree for any encrypted files, and confirmed that they all reside within the one IP core that I stubbed out.
Looking at the IP Cores Summary in the compilation report, I see a bunch of licensed cores, and they are *all* Signal Tap. I don't know if they are causing problems as well, or not. Small problem: I also do not have Signal Tap enabled in settings. Why are these cores showing up here at all?
So, once again: how can I tell what file in my project is encrypted and causing this problem? The tool doesn't seem to be telling me anything useful.
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Hi Nell,
- You can check the license status of all IP in an Intel Quartus Prime project by viewing the Assembler report and click Encrypted IP Cores Summary.
- Remove HDMI IP core from your qsys design and regenerate the system.and you have included .qip/.qsys file in your project befor compiling design delete db and incremental_db.
Regards
Anand
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Hi Nell,
- You can check the license status of all IP in an Intel Quartus Prime project by viewing the Assembler report and click Encrypted IP Cores Summary.
- Remove HDMI IP core from your qsys design and regenerate the system.and you have included .qip/.qsys file in your project befor compiling design delete db and incremental_db.
Regards
Anand
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Thank you, I found the problem.
The HDMI IP core was being included among the PD IP files. I had generated that a long time ago when I was experimenting; it hasn't been used for months but the file was still there, screwing things up even though it was not actually being used in the design. I removed it and now things are behaving as expected.
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