Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Please Help: Invalid JTAG configuration in Signaltap

Altera_Forum
Honored Contributor II
2,180 Views

Hi Experts, 

I encounter a problem in using JTAG (USB Blaster) to program Cyclone device. 

Both Programmer and Signaltap say the device is successfully programmed. But obviously, the device does not function as expected. And signaltap always shows "Invalid JTAG configuration". To compare, I use MCU to program the device using PS mode and it can be really programmed successfully and functions as expected. And signaltap can capture data normally. 

I've searched the Internet for solutions but no useful information is found.  

Did I forget set some options when generating the bit file? 

Please help me on this. Thanks! 

 

I'm using Quartus 10.1SP1 on Windows 7 Pro SP1. 

The target board is user designed board with EP1C6.
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Altera_Forum
Honored Contributor II
959 Views

invalid jtag configuration normally refers to a wrong JTAG interface setup in the respective tool, e.g. Signaltap. 

 

In addition, JTAG configuration may interfer in some cases with the operation of the AS configuration controller. Setting the option "Halt-on chip configuration controller" in Programmer options is generally advisable in my opinion.
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Altera_Forum
Honored Contributor II
959 Views

Hi FvM, 

Thank you for your reply. 

I set the option "Halt-on chip configuration controller" in Programmer options but there's no improvement.
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