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Hi,
I have a general question on pin assignments for design. What are the possible places to do pin assignments for any ALtera/ quartus FPGA design? In one of the designs that I have, there are no pin assignments in qsf, qdf or sdc file. But when I open Pin Planner, I see there are assignments present under "Fitter Location". These are valid assignments for the design and not randomly chosen assignments. So, I was wondering if these were defined in the qsys or some other location. Thanks in advance.- Etiquetas:
- Intel® Quartus® Prime Software
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They should always be in your .qsf. I believe Fitter Location is where it was placed in the previous compile, and only exists if you have a database. They do not drive the fitter on the next compile. You could go to Project -> Back-Annotate and lock them down, which will put them into the .qsf.
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Got it. Thank you very much Rysc :)

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