By default, Quartus flattens all the logic, which makes it difficult for me to apply ASIC constraints to it. What I need is to preserve the hierarchy of some sub-blocks, so it's interface remains intact and constraints can be applied to it.
In Quartus II there were three options for this (Preserve Hierarchical Boundary -> Off / Relaxed / Firm), how do I do this in Quartus Prime (version 17.1.0)?
You can see here, for example in Quartus Prime manual (https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/qts/archives/qts-qps-han...)
"16.3.1 Partitions for Preserving Hierarchical Boundaries" -
Note: The Preserve Hierarchical Boundary logic option is available only in Quartus Prime software versions 8.1 and earlier. Altera recommends using design partitions if you want to preserve hierarchical boundaries through the synthesis and fitting process, because incremental compilation maintains the hierarchical boundaries of design partitions.
Hope that helps