Re: Problem accessing RAM-memory

Altera_Forum · ‎10-21-2009

Hi all,

I'm trying to access a dualport RAM-unit. It's purpose is to act like a FIFO-buffer. Addresses are written to incremently. Thus, the code I'm using looks like:

ram_64_15_write_address <= std_logic_vector(to_unsigned( specific_address, 13));

specific_address := specific_address + 1;

In simulation, this process works as it should. However, when I measure the real-life behavior with Signaltap, the signal 'specific_address' is not incrementing at all. Does someone knows the solution to this problem? I am using Quartus II 8.0 web edition.

Regards, Tijmen

Altera_Forum · ‎10-21-2009

Is it in a process triggered by a clock? Is that clock ticking?

Altera_Forum · ‎10-21-2009

you appear to have specific address as a variable rather than a signal, so Im interested

Could you please post more code around the problem area please.

Altera_Forum · ‎10-21-2009

--- Quote Start ---

Hi all,

the signal 'specific_address' is not incrementing at all.

--- Quote End ---

Have you tried to declare 'specific_address' as signal, not as variable? Sometimes this differenciation affects program execution. I have conducted a test specially to see this difference.

Good luck!

Altera_Forum · ‎10-21-2009

@Daixiwen: yes, the process is triggered by a clock.

@okerol: I have also tried to use an incrementing std_logic_vector, which had thesame behavior: working simulation but malfunctioning real-life behavior.

I have solved the problem by not using an address at all: I have used the FIFO-megafunction of Quartus and it's working now.

I was using a self-written RAM-function first, then when that didn't work I tried the RAM-megafunction of Quartus. That showed thesame false behavior.

For the ones that are interested: In the attachment file I have supplied the interesting piece of code from my file. Also an image file from the signaltap is included which shows the signal 'schrijfadres' (the discussed variable I changed to 'specific_address' for this post) isn't changing at all! Only the least significant bit is changing. Again: in simulation, it works as planned.

Altera_Forum · ‎10-21-2009

Oh... by the way: the goal of this project is to create an USB-oscilloscope with a high-sample-frequency. (may explain some statements in my code)

Regards, Tijmen