Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Problem with compiling Quartus project: Working project is not working any more

Altera_Forum
Honored Contributor II
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Hi all, 

I am facing a problem that is not going away in any way. 

The problem is when ever I compile my design it gives the following error: 

 

Can't place 37 pins with 2.5 V I/O standard because Fitter has only 32 such free pins available for general purpose I/O placement. 

 

Well, I have changed few banks to other voltages. Then it begins to complain about other voltages, the same way.  

I am following a tutorial and using their ready made .csv file for pin assignment(importing .csv file). 

This project involves creation of schematic and generation of a Qsys system and then placing the symbol of Qsys system(NIOS II processor) in the schematic.  

 

It worked very fine for few days. Then I changed the Qsys file(according to the part 2 of the lab), and then it stopped working all together(failing to compile since than.  

 

Till part 1 of the lab it was working fine.  

So I again started project (lab 1) many times, but even lab 1 is not working now, and same fitter problem. Please see the attached file also. 

Should I clean things on system level? if yes, then which files should be deleted or option should be changed. 

Any body any guess?
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Altera_Forum
Honored Contributor II
374 Views

Please note that I am using Quartus 16.1

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Altera_Forum
Honored Contributor II
374 Views

The picture is not legible. 

 

Are you still getting the same error? In the Pin Planner, do manual pin assignments instead of just letting the Fitter do it.
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Altera_Forum
Honored Contributor II
374 Views

The picture is not legible. 

 

Are you still getting the same error? In the Pin Planner, do manual pin assignments instead of just letting the Fitter do it.
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