Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
15673 Discussions

Q18.1 fails when NIOSf present (error 13223)

Busy
Novice
652 Views

It seems that I've got the ame error as: https://forums.intel.com/s/question/0D50P00004JfJo2SAF/simple-compile-in-q181-fails.

I open a new thread as it would be awkward to post in the same one...

I've created a simple project included NIOS f + onchip memory.

When I compile, I've got the following error (Synthesis process):

Error (13223): Verilog HDL or VHDL error: cannot open verilog file 'ip/system/system_nios2_gen2_0/altera_nios2_gen2_unit_181/synth/system_nios2_gen2_0_altera_nios2_gen2_unit_181_rcn27uy.v'

But the file exists (even if it is an encrypted one).

I am using Quartus 18.1.2 Build 277 Pro Edition. License seems to be OK (Vendor: Altera/Product: NIOSII Embedded Processor Encrypted output/version: 2011.11/expiration: permanent). I target a Cyclone 10 GX 220 (10CX220YF780I5G)

It works if I use a NIOSe (no license required). It works if I use a NIOSf without any licence (field in the license setup empty); but output configuration file is in a time-limited version. It works if I use a NIOSf and Q15.0 and an Arria II device (an old board).

Can you help? Many thanks!

 

 

 

0 Kudos
4 Replies
AnandRaj_S_Intel
Employee
271 Views

Hi @Busy​ ,

 

  1. The error in case mentioned above is due to directory path length by having smaller working directory / path length we can solve it.
  2. Try by having smaller directory/ path length.

If possible please share the project and images of error.

 

Regards

Anand

 

Busy
Novice
271 Views

Hi,

Thanks for your reply...

The error is still here when having smaller path length (directory: work/niosf).

 

niosf.jpg

 

The project is as simple as the implementation of one NIOS (with onchip memory).

I use Quartus 18.1.2 Build 277 Pro Edition but my maintenance license is expired for Quartus (not for NIOS IP). But as I target Cyclone 10 GX, I understood that license is not required. May it be the source of the problem?

Thanks.

AnandRaj_S_Intel
Employee
271 Views

​Hi @Busy​ ,

 

  1. If Design works fine with Nios ii/e and only fails with Nios ii/f, It should be license issues.

Can you check and confirm?

 

For License Please refer to Intel® FPGA Licensing Support Center to get started, find information on license types, getting a license file,setting up a license file, and resolving license-related issues.

https://www.intel.com/content/www/us/en/programmable/support/support-resources/support-centers/licen...

Otherwise for license file request and activation, log in your “My Intel” account to find Intel FPGA Self Service License Center.

 

Regards

Anand

Busy
Novice
271 Views

Hi,

Solved... by upgrading the license daemon software (see https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/tools/...)

Thanks for the support!

Reply