Qartus VHDL library problem

[Altera_Forum]

Hello to all. 

I must compile a little vhdl file (generated with precision rtl). Quartus gives an error :  Error (10481): VHDL Use Clause error at top_level.vhd(15): design library "cycloneiii" does not contain primary unit "cycloneiii_components"  Can you help me?     --  -- Definition of top_level --  -- 04/01/15 14:54:55 --  -- Precision RTL Plus , 2013b.15 --   library IEEE;library altera_mf;library lpm;library altera;  use IEEE.STD_LOGIC_1164.ALL;  use altera_mf.altera_mf_components.all, lpm.lpm_components.all, altera.altera_primitives_components.all; -- Library use clause for technology cells library cycloneiii ; use cycloneiii.cycloneiii_components.all; entity top_level is   port (  clk : IN std_logic ;  DATA_OUT1 : OUT std_logic ;  DATA_OUT2 : OUT std_logic_vector (7 DOWNTO 0)) ; end top_level ; architecture arc1 of top_level is   signal DATA_OUT2_dup_0: std_logic_vector (7 DOWNTO 0) ;    signal inc_d_0, nx27063z1, inc_d_1, nx39256z1, inc_d_2, nx57428z1,   inc_d_3, nx23040z1, inc_d_4, nx58827z1, inc_d_5, nx37857z1, inc_d_6,   nx53431z2, inc_d_7, clk_int, GND_EXMPLR, nx272, nx_top_level_vcc_net:   std_logic ; begin  GND_EXMPLR <= '0';  ix54494z55375 : cycloneiii_io_obuf port map ( o=>DATA_OUT1, i=>GND_EXMPLR,   oe=>GND_EXMPLR);  clk_ibuf : cycloneiii_io_ibuf port map ( o=>clk_int, i=>clk);  DATA_OUT2_obuf_7 : cycloneiii_io_obuf port map ( o=>DATA_OUT2(7), i=>  DATA_OUT2_dup_0(7));  DATA_OUT2_obuf_6 : cycloneiii_io_obuf port map ( o=>DATA_OUT2(6), i=>  DATA_OUT2_dup_0(6));  DATA_OUT2_obuf_5 : cycloneiii_io_obuf port map ( o=>DATA_OUT2(5), i=>  DATA_OUT2_dup_0(5));  DATA_OUT2_obuf_4 : cycloneiii_io_obuf port map ( o=>DATA_OUT2(4), i=>  DATA_OUT2_dup_0(4));  DATA_OUT2_obuf_3 : cycloneiii_io_obuf port map ( o=>DATA_OUT2(3), i=>  DATA_OUT2_dup_0(3));  DATA_OUT2_obuf_2 : cycloneiii_io_obuf port map ( o=>DATA_OUT2(2), i=>  DATA_OUT2_dup_0(2));  DATA_OUT2_obuf_1 : cycloneiii_io_obuf port map ( o=>DATA_OUT2(1), i=>  DATA_OUT2_dup_0(1));  DATA_OUT2_obuf_0 : cycloneiii_io_obuf port map ( o=>DATA_OUT2(0), i=>  DATA_OUT2_dup_0(0));  nx272 <= '1';  reg_q_7 : dffeas port map ( q=>DATA_OUT2_dup_0(7), d=>inc_d_7, clk=>  clk_int, clrn=>nx272, prn=>nx272);  reg_q_6 : dffeas port map ( q=>DATA_OUT2_dup_0(6), d=>inc_d_6, clk=>  clk_int, clrn=>nx272, prn=>nx272);  reg_q_5 : dffeas port map ( q=>DATA_OUT2_dup_0(5), d=>inc_d_5, clk=>  clk_int, clrn=>nx272, prn=>nx272);  reg_q_4 : dffeas port map ( q=>DATA_OUT2_dup_0(4), d=>inc_d_4, clk=>  clk_int, clrn=>nx272, prn=>nx272);  reg_q_3 : dffeas port map ( q=>DATA_OUT2_dup_0(3), d=>inc_d_3, clk=>  clk_int, clrn=>nx272, prn=>nx272);  reg_q_2 : dffeas port map ( q=>DATA_OUT2_dup_0(2), d=>inc_d_2, clk=>  clk_int, clrn=>nx272, prn=>nx272);  reg_q_1 : dffeas port map ( q=>DATA_OUT2_dup_0(1), d=>inc_d_1, clk=>  clk_int, clrn=>nx272, prn=>nx272);  reg_q_0 : dffeas port map ( q=>DATA_OUT2_dup_0(0), d=>inc_d_0, clk=>  clk_int, clrn=>nx272, prn=>nx272);  ix2_fadd : cycloneiii_lcell_comb  generic map (lut_mask => X"55aa")   port map ( combout=>inc_d_0, cout=>nx27063z1, dataa=>  DATA_OUT2_dup_0(0), datad=>nx_top_level_vcc_net);  nx_top_level_vcc_net <= '1';  ix6_fadd : cycloneiii_lcell_comb  generic map (lut_mask => X"5aa0",  sum_lutc_input => "cin")   port map ( combout=>inc_d_1, cout=>nx39256z1, dataa=>  DATA_OUT2_dup_0(1), datad=>nx_top_level_vcc_net, cin=>nx27063z1);  ix10_fadd : cycloneiii_lcell_comb  generic map (lut_mask => X"5aa0",  sum_lutc_input => "cin")   port map ( combout=>inc_d_2, cout=>nx57428z1, dataa=>  DATA_OUT2_dup_0(2), datad=>nx_top_level_vcc_net, cin=>nx39256z1);  ix14_fadd : cycloneiii_lcell_comb  generic map (lut_mask => X"5aa0",  sum_lutc_input => "cin")   port map ( combout=>inc_d_3, cout=>nx23040z1, dataa=>  DATA_OUT2_dup_0(3), datad=>nx_top_level_vcc_net, cin=>nx57428z1);  ix18_fadd : cycloneiii_lcell_comb  generic map (lut_mask => X"5aa0",  sum_lutc_input => "cin")   port map ( combout=>inc_d_4, cout=>nx58827z1, dataa=>  DATA_OUT2_dup_0(4), datad=>nx_top_level_vcc_net, cin=>nx23040z1);  ix22_fadd : cycloneiii_lcell_comb  generic map (lut_mask => X"5aa0",  sum_lutc_input => "cin")   port map ( combout=>inc_d_5, cout=>nx37857z1, dataa=>  DATA_OUT2_dup_0(5), datad=>nx_top_level_vcc_net, cin=>nx58827z1);  ix26_fadd : cycloneiii_lcell_comb  generic map (lut_mask => X"5aa0",  sum_lutc_input => "cin")   port map ( combout=>inc_d_6, cout=>nx53431z2, dataa=>  DATA_OUT2_dup_0(6), datad=>nx_top_level_vcc_net, cin=>nx37857z1);  ix28_fadd : cycloneiii_lcell_comb  generic map (lut_mask => X"5a5a",  sum_lutc_input => "cin")   port map ( combout=>inc_d_7, dataa=>DATA_OUT2_dup_0(7), datad=>  nx_top_level_vcc_net, cin=>nx53431z2); end arc1 ;

[Altera_Forum]

Did you install the cycloneiii installation files>?

[Altera_Forum]

Yes I did. 

 But if I change the library name from: library cycloneiii ; use cycloneiii.cycloneiii_components.all; to: library cycloneiii_components ;use cycloneiii_components.all; Quartus gives another error: "Error (10482): VHDL error at top_level.vhd(47): object "cycloneiii_lcell_comb" is used but not declared"  If I add the declaration in the architecture of top_level:   component cycloneiii_lcell_comb  generic (  lut_mask : std_logic_vector(15 downto 0) := (OTHERS => '1');  sum_lutc_input : string := "datac";  lpm_type : string := "cycloneiii_lcell_comb"  );   port (  dataa : in std_logic := '1';  datab : in std_logic := '1';  datac : in std_logic := '1';  datad : in std_logic := '1';  cin : in std_logic := '0';  combout : out std_logic;  cout : out std_logic  );  end component;  the compilation was successful. Any ideas??

[Altera_Forum]

the library will be cycloneiii or some other similar name. The _componenets is the package name. 

Copying the component directly in your code will remove the need for the _components package - but you wont be able to simulate it unless you have a library that maps the componenet to an entity

[Altera_Forum]

But then what are the correct libraries to be included for cycloneIII?

[Altera_Forum]

try: 

 library wysiwyg; use wysiwyg.cycloneiii_components.all;

[Altera_Forum]

GOOD!! 

it work!! thank-you!!