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Altera_Forum
Honored Contributor II
2,085 Views

Hi, 

 

I don't understand why the following code doesn't work, can you enlighten me ? 

 

freq_authorization : process(clk) begin if rising_edge(clk) then if ((unsigned(freq) >= "00001100" ) and (unsigned(freq) <= "00111101" )) then --compare if freq entry is between 12 and 59 allowed_freq <= '1'; else allowed_freq <= '0'; end if; end if; end process freq_authorization; 

 

If it can help, modelsim is returning# ** Warning: NUMERIC_STD.">=": metavalue detected, returning FALSE when I run. 

 

Thanks for your help. 

 

EDIT : freq is in std_logic_vector(7 downto 0);
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4 Replies
Altera_Forum
Honored Contributor II
800 Views

freq has not been initialized

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Altera_Forum
Honored Contributor II
800 Views

What do you mean ? Freq is my entry port

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Altera_Forum
Honored Contributor II
800 Views

 

--- Quote Start ---  

What do you mean ? Freq is my entry port 

--- Quote End ---  

 

 

Yes, have you set the value for Freq in your testbench? if it contains 'U' (uninitialised) or 'X' (unknown) then you get the warning you have.
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Altera_Forum
Honored Contributor II
800 Views

Thanks, your advices led me to solve my problem.

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