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After find the example of Avalon MM, i do not know how to apply to Mac Control Interface
how to set address of register of mac address to address[7:0] ? any example about this setting?Link Copied
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Have a look at page 6-3 of the datasheet (http://www.altera.com/literature/ug/ug_ethernet.pdf). The Mac address is fixed with registers mac_0 and mac_1 at addresses 0x03 and 0x04.
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i find this, but in VHDL, how can i set mac address at 0x03 and 0x04, it seems for assembly language or c language, how about VHDL?
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I suggest that you have a look at Altera's Avalon specification, especially the Avalon Memory Mapped Slave interface. You will find timing diagrams there.
Basically to write to register 0x03, you need to put address at 0x03, writedata with the data you want to write, set the write signal to '1' and wait for wait_requested to be '0'- Mark as New
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some things i am confused, do this altera ethernet IP generate ethernet frame itself so that i do not need to build ethernet frame and pass this frame to tx data?
if not, why it need mac address? i think it only need to send ethernet frame out once enable in every clock cycles, there is no need to care the mac address i send as i can build ethernet frame- Mark as New
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The Mac generates the Ethernet frame preamble and the CRC. You still need to provide a full Ethernet header, including the source and destination MAC addresses.
The MAC address that you set with those two registers is mostly used for the receiving part. The Mac includes a filter that will only let you receive the Ethernet packets that are sent to the configured MAC address, or the broadcast packets. The other packets are ignored and not transmitted to the avalon stream.- Mark as New
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after your explanation, it becomes clear, how can i put address at register 0x03 in VHDL as i do not use SOPC, would like to use pure VHDL to use this ethernet IP
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just assign the value 0x03 to whatever signal you connected to the TSE's address port.
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