Routing Back Annotation in Quartus Prime Pro

[TMVector]

Hi there,

I am trying to generate an RCF (routing constraints file), but it isn't an option in the "Back-Annotate Assignments" dialog box, and running via CLI just gives a warning.

The help documentation says you need to disable "Logic Cell Insertion - Logic Duplication" and "Auto Register Duplication" options to perform routing back-annotation, so I tried that, plus options that seemed related. These are the relevant lines from my qsf.

set_global_assignment -name ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION OFF
set_global_assignment -name AUTO_LCELL_INSERTION OFF
set_global_assignment -name ROUTER_REGISTER_DUPLICATION OFF
set_global_assignment -name ALLOW_REGISTER_DUPLICATION OFF

There is still no routing option in the dialog box, and running the CLI gives this output:

$ quartus_cdb stratix10gx2800 --back_annotate=routing
Info: *******************************************************************
Info: Running Quartus Prime Compiler Database Interface
Info: Version 21.3.0 Build 170 09/23/2021 SC Pro Edition
Info: Copyright (C) 2021 Intel Corporation. All rights reserved.
Info: Your use of Intel Corporation's design tools, logic functions 
Info: and other software and tools, and any partner logic 
Info: functions, and any output files from any of the foregoing 
Info: (including device programming or simulation files), and any 
Info: associated documentation or information are expressly subject 
Info: to the terms and conditions of the Intel Program License 
Info: Subscription Agreement, the Intel Quartus Prime License Agreement,
Info: the Intel FPGA IP License Agreement, or other applicable license
Info: agreement, including, without limitation, that your use is for
Info: the sole purpose of programming logic devices manufactured by
Info: Intel and sold by Intel or its authorized distributors. Please
Info: refer to the applicable agreement for further details, at
Info: https://fpgasoftware.intel.com/eula.
Info: Processing started: Fri Oct 8 13:32:03 2021
Info: System process ID: 11421
Info: Command: quartus_cdb stratix10gx2800 --back_annotate=routing
Info (16677): Loading final database.
Info (16734): Loading "final" snapshot for partition "root_partition".
Info (16678): Successfully loaded final database: elapsed time is 00:00:07.
Critical Warning (18414): Only the the pin_device back annotation mode is supported in the Quartus Prime Pro Edition (PE) software
Info: Quartus Prime Compiler Database Interface was successful. 0 errors, 1 warning
Info: Peak virtual memory: 4545 megabytes
Info: Processing ended: Fri Oct 8 13:32:11 2021
Info: Elapsed time: 00:00:08
Info: System process ID: 11421

Running with DSPs as the resource to back-annotate instead of routing seems to work okay (although I don't use any DSPs in the design).

I believe routing back-annotation should still be possible on Stratix 10 devices because the Intel paper "SpiderWeb - High Performance FPGA NoC" by Martin Langhammer, Gregg Baeckler, and Sergey Gribok uses it with an "Intel Statix 10 ST280EY2F55E2GVI1".

"We extracted routing information from the back annotation flow for the locations from the destination registers which fell within the specified performance range. This routing data was used to populate the RCF (Quartus routing constraints file) before the next place and route."

I am using Quartus Prime Pro 21.3.0.170, targeting Stratix 10 GX 2800 (1SG280LU2F50E2VG).

Thanks,
Jonny

[Nurina · Accepted solution]

Hi Jonny,

I think you should use logiclock_back_annotate -routing instead.

You can refer to section 3.1.1.2 of this document: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-qpp-scripting.pdf#page=71

Regards,

Nurina

[Nurina]

Hi Jonny, any updates?

[Nurina]

Hi Jonny,

We did not receive any response to the previous question/reply/answer that I have provided, thus I will put this case to close pending. Please post a response in the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you with your follow-up questions.

Regards,
Nurina

P/S: If you like my comment, feel free to give Kudos. If my comment solved your problem, feel free to accept my comment as solution!

[mistersinha]

Nice

[TMVector]

Hi Nurina,

Thanks for your reply -- it was very helpful and looks to be the right path. I haven't managed to confirm it yet because it's a part time project and the build is currently failing on a different issue, so routing back-annotation won't run yet. Once I have fixed that, I will post an update that will hopefully be helpful for others (and serve to remind me in the future!).

Thanks,
Jonny