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15322 Discussions

STA failed during rapid recompilation

cosx
New Contributor I
400 Views

Hi everyone, I came across a strange problem in Quartus 15.1 standard edition.

The error is at rapid recompilation step whenever I add instrument circuits in the old design. This error is shown below:

Internal Error: Sub-system: STA, File: /quartus/tsm/sta/sta_clock_mgr.cpp, Line: 2363

Integer overflow occured when trying to find the "multiply_by" or "divide_by" parameter of the generated clock the_system|acl_iface|acl_kernel_clk|kernel_pll|altera_pll_i|cyclonev_pll|counter[0].output_counter|divclk
Stack Trace:
   0x3034eb: STA_CLOCK_MGR_IMPL::initialize_derived_clock(STA_CLOCK*) + 0xdab (tsm_sta)
   0x305eb1: STA_CLOCK_MGR_IMPL::identify_ignored_clocks_recurse(STA_CLOCK*) + 0x51 (tsm_sta)

   0x30620f: STA_CLOCK_MGR_IMPL::initialize_derived_clocks() + 0x7f (tsm_sta)

In Quartus 19.1, this error was solved by adding 

set_global_assignment -name DISABLE_LEGACY_TIMING_ANALYZER ON

 
However, this solution did not work for Quartus 15.1 because this command would cause errors.
 
May I ask if anyone has come across this situation before?
 
Thank you in advance!
Mingqiang
0 Kudos
1 Solution
Nurina
Employee
314 Views

Hi,


I was able to reproduce your problem in Quartus Standard version 15.1.2, but not in the later versions. Unfortunately our engineering team does not support Quartus Standard version 15.1.2 anymore so I cannot report this problem to them.


I suggest you migrate to Quartus Standard v19.1 as the error does not arise in this version. This is the latest version of Quartus Standard that still support OpenCL. Also since you're using ALTERAOCLSDKROOT in your design it needs to be changed to INTELFPGAOCLSDKROOT as it has been upgraded in v19.1.


Regards,

Nurina


View solution in original post

7 Replies
Nurina
Employee
389 Views

Hi Mingqiang,


The workaround you mentioned for v19.1 is meant for a different Internal Error.


Can you provide your project file so I can reproduce your error?


Thanks,

Nurina


cosx
New Contributor I
381 Views

Hi Nurina,

Thank you very much for your reply!

I firstly correct myself that at the full compilation stage this error occurs, not just at rapid recompilation.

The original file is too big to contain even after compression and so I attach a similar project without compilation.

This project is based on Quartus 15.1 standard edition installed on Linux.

If you compile this project directly using the command below, you are likely to find the error attached above.

aoc -v .aoco (project directory) --board c5soc 

 

I personally also has some finding of the errors and would like to share them here. 

The text file that records the whole compilation flow of the project is attached as error_file.txt.

The errors are at line 8008 and 8009.

 
There are some lines just before the error (line 8005-8007):
 
Info: kernel clk has period: 404.996
Info: kernel clk has multby: 1 and divby: 454
Info: Using adjusted multby: 404996 and divby: 510112584
 
Multiplying and dividing numbers in these lines give rise to the overflow and probably this is the reason for the error.
 
Look at these numbers at the stage just after adjust_plls.tcl being called (Line 7417-7424):
 
Info: Solved VCO for C 454: 404.059997201 8 1 1362309 4000 20 2 (vco m n k r cp div)
Info: Computed PLL settings: fmax m n k c0 c1 r cp div
Info: Computed PLL values: 0.889999993835 8 1 1362309 454 227 4000 20 2
Info: finfpd 50.0
Info: post-div fvco 404.059997201
Info: true fvco 808.119994402
Info: kernel_fmax 0.889999993835
Info: kernel2x_fmax 1.77999998767
 
One can see that after pll adjustment, the clock speed is determined to be maximum of 0.89MHz (0.8899999) which is nonsense.
 
Then look at the VCO period 404.059997201,  and the multiplier (n=1) the divider (c0=454), they all occur in the lines before the error.
 
In order to compensate this 404.996 MHz to be 0.89MHz, the system makes decision: *404996 /510112584.
 
Since the smallest frequency the PLL can achieve is not even 0.89MHz, these numbers do not make sense at all and thus cause errors in the STA.
 
Above are my analysis and further investigation fount that the slack at line 7341 compensates the clock frequnecy is -1103.311!!
This is a huge number and that is why the clock frequency is so low!!
 
However, I am not sure whether my analysis is absolutely correct and also I am not sure why Quartus gives such large slack.
 
Therefore, I would still kindly ask help if you can help me solve this problem.
 
Thank you again!
Mingqiang
Nurina
Employee
349 Views

Hi,


I can't seem to reproduce your error because the qar shared didnt include the system.qip file. Is it possible for you to share a zip file of the project?


Thanks,

Nurina


cosx
New Contributor I
334 Views

Sure! 

In order to reproduce the errors, all error files need to be restored to the original project.

Here is the step:

1, Cut all files in the error_file6 into the db folder in the error_file2.

2, Cut all non-folder files in the error_file8 into the incremental_db folder in the error_file4.

3, cut all folder from the error_file2 to error_file8 into the float_add_mult folder in the error_file1.

4, the error_file1 is now the original project.

After doing these, open the float_add_mult project top.qdf  files.

Then use Quartus 15.1 standard edition to perform full compilation. (Or use command "quartus_sh --flow compile top -c top" from linux terminal.)

You will reproduce the error.

Thank you!

Mingqiang

 

Nurina
Employee
315 Views

Hi,


I was able to reproduce your problem in Quartus Standard version 15.1.2, but not in the later versions. Unfortunately our engineering team does not support Quartus Standard version 15.1.2 anymore so I cannot report this problem to them.


I suggest you migrate to Quartus Standard v19.1 as the error does not arise in this version. This is the latest version of Quartus Standard that still support OpenCL. Also since you're using ALTERAOCLSDKROOT in your design it needs to be changed to INTELFPGAOCLSDKROOT as it has been upgraded in v19.1.


Regards,

Nurina


Nurina
Employee
301 Views

Hi Mingqiang,

We did not receive any response to the previous question/reply/answer provided, thus I will put this case to close pending. Please post a response in the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you with your follow-up questions.

Regards,
Nurina

PS: If you find any comment from the community or Intel Support to be helpful, feel free to give Kudos.

cosx
New Contributor I
288 Views

Hi Nurina,

Sorry for the late reply as I just graduated from university and was having a trip.

Thank you very much for your and since the problem is not supported, I would probably change to a modern version of compiler.

Best Wishes,

Mingqiang

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