Signaltap retrieve data .... after having plugged JTAG

[Altera_Forum]

is it possible to plug the jtag (usb blaster or other) and retrieve captured data (aquire data a postiori) with signaltap? 

 I mean :  

1. Program a FPGA with SignalTap, 
2. Let the board functionning alone, let internal SignalTap capture data because trigger has occured
3. Plug USB Blaster

   I know there is a power up capture, but I want to retrieve data after an other trigger condition was met.  Is it possible ?  notes : (1) : Does SignalTap work alone in FPGA = without having to press "Run analysis" ? (2) : Is there an risk of loosing FPGA configuration when pluggin USB Blaster ?  Cordially.

[Altera_Forum]

--- Quote Start ---  is it possible to plug the jtag (usb blaster or other) and retrieve captured data (aquire data a postiori) with signaltap?  I mean :  

1. Program a FPGA with SignalTap, 
2. Let the board functionning alone, let internal SignalTap capture data because trigger has occured
3. Plug USB Blaster

   I know there is a power up capture, but I want to retrieve data after an other trigger condition was met.  Is it possible ?  notes : (1) : Does SignalTap work alone in FPGA = without having to press "Run analysis" ? (2) : Is there an risk of loosing FPGA configuration when pluggin USB Blaster ?   Cordially.  --- Quote End ---    Why can't you do it in the usual order? 1. Plug in USB BLASTER 2. Launch Quartus > SignalTap program the FPGA with SignalTap 3. Let the board function and capture data when it triggers. 4. Download data.

[Altera_Forum]

I try to find a cause of a disfunction that stops a system : it occures at 1 min or lots of days after power-on. 

Because JTAG can reconfigure FPGA, I prefer NOT plugging USB Blaster when the board is functionning. The risk is too important.  I made a "datalogger" board but it captures onl a few signals wich are not significant enough.  So I would like to offload data from Signaltap AFTER triggered (and after securizing the system).

[Altera_Forum]

I think you would need USB blaster connected for the SignalTap to run. I believe the data is real time streamed into the PC which are connected to the board.

[Altera_Forum]

I think too. 

That is a risky solution.  So I am on other way.

[Altera_Forum]

Why not just leave the USB-Blaster plugged into the board? That way the USB-Blaster is not "hot-plugged" into the JTAG header while your board is powered. 

 You could leave the USB-Blaster plugged into a PC, so that the cable electronics is also powered, but that is not required. You could just plug the USB-Blaster USB connector into your PC after the board has been powered.  SignalTap II has a power-on trigger configuration. This allows the FPGA instance of SignalTap II to trigger, and then you can retrieve the trace at a later time. I have used this to capture an event that would only occur every few days.  Cheers, Dave

[Altera_Forum]

Because JTAG can set the FPGA into a high impedance which is catastrophic in my system, I can't allow that. 

   --- Quote Start ---   You could just plug the USB-Blaster USB connector into your PC after the board has been powered.  --- Quote End ---   NOT sure. I had burnt USB Blasters this way, I think.

[Altera_Forum]

--- Quote Start ---   Because JTAG can set the FPGA into a high impedance which is catastrophic in my system, I can't allow that.   --- Quote End ---   Only if the TAP machine is programmed to issue the HIGHZ command. Its unlikely to randomly issue this command.    --- Quote Start ---   I had burnt USB Blasters this way, I think.    --- Quote End ---   It should work fine. The VCC_OUT voltage from the 10-pin header goes to dual-voltage buffers that are tolerant of either supply powered before the other.  Cheers, Dave