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Hi everybody,
In the Stratix III Device Handbook volume 1, figure 2-11 indicates that in arithmetic mode, one can use 3 inputs (dataa, datab and datac) for the 2 first ALUT and use the outputs of the ALUT with the adder. I try to compute : s <= a xor b xor c c <= a and b and c o <= s + c If I well understand the handbook, I'd have (a xor b xor c) in the 1st ALUT, (a and b and c) in the 2nd and then the sum (s+c) with the adder. But when I look the obtained design in Technologie Map Viewer, the 2 logic functions are computed in 2 different half ALMs, and then the sum in a 3rd half ALM with only buffers for the ALUTs. I can't map all my functions in only one half ALM. Is there a special HDL coding style to use this kind of functionalities ? Thanks for your helpLink Copied
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There is no coding style to force things to happen at a very low level (maybe with attributes, but it would be very diffucult) - the only way to do this would be to instantiate the primitives manually.
Basically, the synthesisor does what should be best for your design. overruling the synthesisor can be hard work.- Mark as New
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--- Quote Start --- Basically, the synthesisor does what should be best for your design. overruling the synthesisor can be hard work. --- Quote End --- This is obviously true in arithmetic operations. But as I found out in Cyclone III tests, the synthesis tool doesn't take full advantage of arithmetic mode for non-arithmetic problems, e.g. by utilizing the carry chain. I guess, this may be also the case with Stratix ALM. See: http://www.alteraforum.com/forum/showthread.php?t=27881
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Thanks for your help. I'll try to use primitives manually
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I try to use the primitives manually but I can not give the correct value to the LUT mask of the stratixiii_lcell_comb primitive. I searched in the Altera's documentation pages, but unsuccessfully. Does anyone have documentation about this ?

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