What kernel does is just read from Global Memory, then write the same data to write IOchannel. Since reads from GM always has extra reads, it affects the behavior of the write to IO channel.
Forgot to ask the question. Do you have any known issue with implementing IO channel? The kernel seems to do some prefetching of 4 extra bursts of data. Each burst count is 16. Data width is 512b. Total of 4KB extra read.
Currently I am reviewing the forum for any open questions and found this thread. I apologize that no one seems to answer this question that you posted. Since it has been a while you posted this question, I'm wondering if you have found the answer? If not, please let me know, I will try to assign someone to assist you. Thank you.
Perhaps, can you provide more details on what you are trying to do here? What tools are you using to perform the kernel test to read from the IO channel? Please provide some steps or screen shots. Then it would be easier for us to identify whom can help on this thread as long within FPGA product and tools.