Timing violation

[Altera_Forum]

Hello 

 I has create a symbol with the toplevel from the 5 megapixel demo project TRDB_D5M_CD_v1.0 for DE2 Board. But when I insert the symbol in a block diagram and sets the Input/Output, after the synthese I have timing violation and the VGA-Monitor d'ont display a perfect image. The same problem I have with the video demo on the Terasic CD DE2_TV.  In the attachment you find the two demo project, could you try on your system? Maybe your found the problem....  For any tips I thanks....

[Altera_Forum]

--- Quote Start ---  Hello  I has create a symbol with the toplevel from the 5 megapixel demo project TRDB_D5M_CD_v1.0 for DE2 Board. But when I insert the symbol in a block diagram and sets the Input/Output, after the synthese I have timing violation and the VGA-Monitor d'ont display a perfect image. The same problem I have with the video demo on the Terasic CD DE2_TV.  In the attachment you find the two demo project, could you try on your system? Maybe your found the problem....  For any tips I thanks....  --- Quote End ---    Hi,  in which of the projects I should find your BDF-file ?  Kind regards  GPK

[Altera_Forum]

If you can do a "report_timing" in TimeQuest on the worst case failing path, we can help troubleshoot more directly. WHen you get the spreadsheet report, just go to File -> Export and export a .csv or .xls.  

 First check that the source and destination clocks are synchronous and phase aligned.  Mike

[Altera_Forum]

Hi, 

 can you make the bdf file yourself, --> open toplevel verilog code and then File\Create_Update\Create Symbol for Files from current Files. Then open New\Block Diagram Insert Symbol\right button mouse on Symbol and Create Inputs with right Assignment. And then RUN Synthese.  Sorry, I don't can upload the entire project, size to big....  I hope you find 10 minutes for this...   Thanks you very much...

[Altera_Forum]

I have resolved the problem. 

 I export the Pin Assignment from the original DE2_TV inclusive the "Export back-annotated routing" and "Save a node-level netlist of the entire design into a persistant source file"  yeppaaaa.. it works well now. I have also make a SopC Symbol and include it now I can make my camera tracking...  Thanks a lot...

[Altera_Forum]

Hey, Antonio, 

So, what happened here? Possibly you were getting Fitter assigned pin placements. That's why back-annotation would fix it. Something else?  Mike

[Altera_Forum]

yes... :confused: 

 or can you specify your question?  sorry I don't understand what you mean...