Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Unable to find the User Guide document for "dma_read_master" and "dma_write_master" version 23.1

Kassen
初學者
735 檢視

Hello,

I am unable to find a user guide of IP cores: "dma_read_master" (Read Master Intel FPGA IP) and "dma_write_master" (Write Master Intel FPGA IP) of version 23.1 both.

links to user guides are broken:
dma_read_master:
https://documentation.altera.com/#/link/dmi1420813268955/dmi1421419198649 
dma_write_master:
https://documentation.altera.com/#/link/dmi1420813268955/dmi1421419198649

Those IP are sub-core of altera_msgdma (Modular Scatter-Gather DMA Intel FPGA IP).

Thank you

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sstrell
榮譽貢獻者 III
687 檢視

Everything is usually in the Embedded Peripherals IP user guide: https://www.intel.com/content/www/us/en/docs/programmable/683130/25-1/introduction.html

KennyTan_Altera
638 檢視

Thanks for your question, this is a bug in our PD. I will attached the file for you temporally,


We will fix this in the future release of Quartus.


Kassen
初學者
599 檢視

Thank you very much, the case now can be closed.

KennyTan_Altera
506 檢視

I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


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