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Since I couldn't find any relevant answer in previous posts or tutorials, here's my 1st post, with a "tough" question.
I have a medium-size Quartus II v.9.0 project for Cyclone III EP3C5E144, which I want to partition, with 1 partition being a subdesign and the 2nd partition being everything else. I followed the very clear step-by-step tutorial and everything went smooth, until I hit a nasty unexpected error. My partitioned subdesign has an output to the parent level, which is a large parallel register (268 outputs). --------- excerpt from .TDF --------- frame_drop[267..0] : OUTPUT; ------------------------------------- When generating the partition, outputs frame_drop[267..0] have been declared "Virtual Pin", and they are listed as "Virtual Pin", "On" in the Assignment Editor. But when I Start a Compilation of the partition, it successfully completes Analysis and Synthesis, but fails to Fit, with error message: "Can't place 208 pins with 2.5 V I/O standard because Fitter has only 88 such free pins available." Now I wonder: why is Quartus trying to fit these 268 partition outputs to *physical* output pins, since it knows they are *Virtual* pins? I am running a licensed Quartus II v.9.0 SP2 (License Type = Full Version in License Setup). Thank you for your kind help, Mauro CerisolaLink Copied
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Solved!
Turns out that when doing the "Generate Bottom-Up design partition scripts", Quartus automatically declares Virtual Pins the Output signals of the child partition, but only if they are used by the parent partition. If the Child outputs are *unused*, they get assigned to an Output pin (!). I had about half such outputs unused. I had to manually declare ALL such outputs Virtual Pins. Mauro Cerisola
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