Hello, I would like to get comments from those that have used the Xilinx tools and the Intel tools the question, "Which company has done FPGA/ARM software development right?".
I mean which tools are easier to use and can get the task of software development done quicker.
Neither, but Xilinx is vastly superior to Altera for embedded development. It's not even close. Unless you are developing data center servers, Intel does not care about your business. It's the reason they bought Altera and nothing else matters to them.
Your alternatives are:
1) Get a Zedboard and you can be up and running in short order on Xilinx using free tools to test it out. There is a vast support system, many examples, and you can just click a button to add most things to the BSP. I had a FreeRTOS+TCP app running in a few hours (although I had used Vivado previously).
2) Get and Altera SoC kit and spend months pulling out your hair trying to figure out what deranged maniac came up with the Altera tool flow. No examples, no support (look at these forums). The decision to use UBOOT and off the shelf DS5 seems to be the source of most of their problems, but I've been told they think their tools are wonderful. The Altera tools have been broken for many years (I first looked in 2014) and are actually getting worse, not better.
If you have a choice, RUN away from Altera SoC as fast as you can.
I agree with corestar.
In my minor brush with using Altera SOC any support was farmed out to rocketboards.org
Little support from Altera, and as a beginner in things SOC it wasnt much fun.
They are the only tools Ive tried
I think the problem stems from the fact that Altera were late to market for the Arm SOC parts, so everyone took Xilinx parts (Zynq). Then they basically gave up on the market as they'd lost to Xilinx and focussed on the 10 series. Then Intel bought them and they're moving away from embedded and becoming CPU accelerators, with a big push with OpenCL.
If you check the posts on this forum, a lot of them relate to Open CL.
To provide a bit more detail, let's compare the tool flow. In both cases, you create the hardware first. With Xilinx you have Vivado which at least provides a visual of what you have created. With Altera, you use Qsys, which I don't care for, but it is at least usable. Personally, I would abolish wizards since they make it difficult to see exactly what you have done.
Given the hardware, the tools now have all the information they need to create the processor system. Xilinx does just that. You just click on "Export to SDK" in Vivado and it creates the hardware C functions inside SDK used to boot the processor(s). The SDK project will have a separate BSP project and then a third one for your user code.
I found a good source is Zynq Geek (a bit out of date, but still easy to follow):
With Altera, all hell breaks loose. The step that is a single button click on Xilinx is a massive convoluted mess with Altera. The only source I found is the following gibberish:
I eventually got it working on a Cyclone V. But we planned on using an Arria 10 SoC. Please note the comments "U-Boot compilation is only supported on Linux host PC's". Unbelievable!
For the SoC tools, Altera does not grasp the notion of an example. The FPGA equivalent of the famous C "Hello World" is blinking some LED's and maybe reading a push button. A useful example starts from scratch, creates a simple design, explains what and WHY you do each step. It gives a feel for the tool flow and provides the basis for adding features.
Altera provides a massive turd called the Golden Hardware Reference Design (from rocketboards.org as Tricky said). There is no explanation of how it was created or what it does. Booting a system preinstalled on an SD card IS NOT (I repeat IS NOT) a useful example.
The reason I spent so much time trying to get the Altera SoC tools working is I greatly prefer Quartus to Vivado and the Altera hardware is superior to Xilinx at a lower price. I think it says how bad the Altera tools are that I would switch back to Xilinx SOLELY because of them.
I normally try to be temperate when posting in forums, but the Altera SoC tools really have me going off the deep end. Whoever is in charge of them should be removed from that position. It's pretty clear the tool flow was designed by Unix weenies. I spent the first ten years of my career on Unix. A Unix weenie thinks editing 20 files (preferably undocumented :-) ) and recompiling a driver is a sensible way to add a printer.
Years ago a regional manager told me Altera only reluctantly got into the SoC market and had outsourced it all to Malaysia. This did not seem to jive with the fact that "SoC this and SoC that" is all they blather on about in their news releases. But it does appear they have no interest in fixing their tools.
And the thing that makes it all the more infuriating is all they had to do was copy Xilinx (or even their own NIOS) tool flow.
So these names you read on Rocketboard posts from Malaysians working for Intel? Interesting. It seems that Intel does provide some support there, but it really needs to be more systematic. If Intel wants to be serious, they should (be and I hope they are) working on the foundation, namely, the delivery of support. Of course, content is also important, but only for as far as you can find it, but there is already a topic about that...
In fact, you see Xilinx execs talking about the same hardware acceleration and deep learning topics that Intel is talking about (maybe we should all switch to Microsemi ?) As customers, we can most effectively wag Intel by throwing money at them, and if Microsoft really has put an Arria10 in every Azure web server board, then that is a lot of Arria10s, compared to the few that we buy.
So I am wondering, how can we find a shared interest, and how can I profit from these developments.
To get back on topic, in light of these massive numbers, I also do not see why Intel PSG should be interested in doing more for SoCs, so I guess the best thing we can do is to help the Malaysians do the best possible job, as I guess at least they should be interested in SoC success.
I don't think the manager who mentioned this to me meant anything derogatory about Malaysia but rather to make it clear SoC FPGA's were not something Altera had any great interest in and did not closely monitor the tool development. They found a cheap place to outsource it and washed their hands of the matter.
Altera (ie PSG) revenue has actually been going up, but it appears to be all data center. To a company as large as Intel, the revenue from the other markets is probably just not worth worrying about. Intel just seems geared towards large expensive chips and always seems to fail on the lower end.
I tried Microsemi SmartFusion. It's ok, but zero support and the tools are rudimentary (that was 3 or 4 years ago, so may have changed).
Sorry my post seemed to imply something derogatory in my post, that was not my intention.
The Polarfire SoC uses Synopsis Synplify software for Synthesis, I have not used it, but I suspect that, as Synopsis has EDA software as its core business, it should be OK. If the SoC integration is any good is another thing.
schendel_nsf, you really did not say anything derogatory but people are hypersensitive these days (at least in the US) and I just wanted to make sure I did imply the manager had said anything derogatory.
The PolarFire is an impressive chip that puts Cyclone V to shame, but I don't think there is a SoC version. And the price is very high.
The Microsemi SoC is the SmartFusion2. I tried it out. The tools are poor and the support is so bad (ie none, not even a poorly designed forum like this one) it makes Altera look good. The compile times are very long (I think they only use one processor). Again, this is four year old information, so things could have changed.
When it comes to SoC FPGA, it's pretty much Altera and Xilinx. And unless you are using Linux for a data center application, it's basically Xilinx.
When it comes to non SoC FPGA's, we're taking a wait and see. Based on talks from their CEO, I suspect MAX 10 and Cyclone V are the end of the road for that level chip and Intel will only do high end data center chips. Hopefully I'm wrong (what do I know), but Lattice and Microsemi provide viable alternatives. All these chips (MAX 10, Cyclone V, Lattice ECP5) are several years old at this point.
Carlhermann, that's interesting. I've gotten good support from Microchip and they are doing some innovative things in ADC and clocking. A "FLASH" based FPGA with high quality on chip clock and the ability to drive high quality clock from the FPGA to DAC's and ADC's would dramatically simplify alot of data acquisition systems.