Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Why won't the altera floating point add sub ip synthesize?

PEgan
Novice
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Tried including the altfp_add_sub ip core in my project but cannot synthesize it. Each time I attempt to do so I get the following message:

 

'Error (12006): Node instance "altfp_add_sub_component" instantiates undefined entity "altfp_add_sub". Ensure that required library paths are specified correctly, define the specified entity, or change the instantiation. If this entity represents Intel FPGA or third-party IP, generate the synthesis files for the IP.'

 

I have made no modifications to the output of the IP catalog. I am currently running Quartus 19.1 on Arch Linux

 

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PEgan
Novice
1,666 Views

Turns out the design won't synthesize because I am using the free web edition of Quartus 19.1, while this IP is only available in the standard and pro editions. This is a bit confusing considering I am still prompted with the option to add Altera Floating Point IP. What makes this even more frustrating that I was only able to discover this after searching through the Floating point IP core documentation which itself isn't immediately available unless you go searching for it online.

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PEgan
Novice
1,667 Views

Turns out the design won't synthesize because I am using the free web edition of Quartus 19.1, while this IP is only available in the standard and pro editions. This is a bit confusing considering I am still prompted with the option to add Altera Floating Point IP. What makes this even more frustrating that I was only able to discover this after searching through the Floating point IP core documentation which itself isn't immediately available unless you go searching for it online.

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