Wrong syntax highlighting in editor when using "define" in Verilog

[JoeLUH]

Hi

Switching from Quartus Prime Standard 19 to >=20 I found out that the syntax highlighting is not working correctly any more in the editor if a definition statement is given in a different file. I'm using Verilog.

For instance:

File 1 "switches.sv" :

`define USETHIS

File 2 "main.sv" :

module test1
(
 input clk,
 input reset

);

`ifdef  USETHIS

wire one;

`else

wire two;

`endif

[..]

endmodule

Both files are in the same hierarchy and folder.

The compiler uses "wire one" as expected but the editor highlights "wire two" ignoring the definition. Only if I put  " `define USETHIS " into file 2 the editor interpretes it and highlights the correct line.

Is there any new setting that I missed out - or is this a bug?

[sstrell]

Do you mean like color highlighting to indicate keywords?  (A screenshot might work better here.)  Had you run analysis & elaboration at least?  There's no way a file would know anything about what's in another file in the project until you at least run A&E.  If you're saying this is still incorrect after a full compilation, then yeah that may be a bug.

[JoeLUH]

Hi sstrell,

yes, that concerns the keywords and also // comments .

These are the two files as visible in editor after full compilation, behaviour is described in the sources:

Since I'm generally using numerous switches in my projects, this bug (if it is a bug) makes my all source codes unreadable for me - so I'm forced to go back to older versions.

I'm wondering if some others have detected and described this, since it appears since version 21 or 20 (not sure right now). I've been seeking for that but haven't found anything.

Could it be reported somewhere?

[RichardTanSY_Intel]

I checked 19.1, 20.1, 21.1 and 22.1, it seems to be a GUI issue. I will report this to the engineering team.

You still able to compile the design even if the syntax is not highlighted, right?

Best Regards,

Richard Tan

[JoeLUH]

Yes, exactly. It does compile correctly when setting the switches. Can be tested with the line "force_error" in my above sample code.

Best regards,
Joe

[RichardTanSY_Intel]

Just to inform you that the engineering team is looking into this.

Regards,

Richard Tan

[RichardTanSY_Intel · Accepted solution]

Thank you for the feedback provided on this issue.

The engineering team has aware of this issue and they will plan to fix this. (usually will takes some time e.g. a couple of months before it got fix in the next Quartus release.)

Since this issue will be planned to be fixed, do you need further help in this case?

Regards,

Richard Tan

[JoeLUH]

Thank you. In the meantime, I will get along with one of the older versions.

Best regards, Joe

[RichardTanSY_Intel]

Yes, please use the older version for now.

With that, I will now transition this thread to community support. If you have a new question, Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

Thank you.

Best Regards,

Richard Tan

p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.