de2 as Active Serial Mode

[Altera_Forum]

Hello,, 

 I hope to help me.  I have de2 board ( cyclone 2), I am trying to downloading verilog hdl program to EEPROM via Quartz 2 software with Active serial mode programming. After downloading, there is a message " downloading was successful" but when i want to implement my programm on the board there is no response?!   I am please if one who can help me ..  Regards,

[Altera_Forum]

--- Quote Start ---   please if one who can help me ..   --- Quote End ---    Before you download your configuration to the EPCS device you should really confirm that it works via JTAG download. Here's what I recommend;  1. Use Quartus to configure the FPGA directly.   Test your program. Does it work?   If yes, then ...  2. Use Quartus to configure the EPCS device on the board.  Because you know that step 1 worked, then step 2 should also.  Cheers, Dave

[Altera_Forum]

Thank you Mr. Dave for response  

 I do what you say, the download is successfully completed but no response on the board   Is the software must be compatabile, i.e., the version of Quarts programm.  Regards

[Altera_Forum]

--- Quote Start ---   I do what you say, the download is successfully completed but no response on the board    --- Quote End ---   This is not enough detail. You need to download a known-good design that you expect to do something, eg., blink LEDs.  Successfully compiling and downloading a design is not sufficient. That design *must* have the correct pin assignments. If you do not have the correct pin assignments, there is a good chance you will damage your board.  So, create/compile a simple design that blinks and LED, or routes the switch over to an LED, and test that.  Cheers, Dave

[Altera_Forum]

How I can " Quartus to configure the EPCS device on the board"? 

 Are there any requirements to download the verilog hdl file on the EPCS16?  Regards

[Altera_Forum]

--- Quote Start ---  How I can " Quartus to configure the EPCS device on the board"?  Are there any requirements to download the verilog hdl file on the EPCS16?   --- Quote End ---    Your question indicates that you have not spent enough timing studying how FPGAs work. Please go and read some more.  FPGA synthesis tools read HDL files and produce configuration files. The configuration file with the extension .sof is what you download directly to the FPGA via JTAG.  The .sof file can be converted to a format that is compatible with the EPCS EEPROMs, but the required format depends on whether your board has an active serial header, or uses the JTAG header and JTAG indirect mode, which first loads the FPGA, and then uses JTAG to program the EPCS EEPROM.  These comments should contain enough key-words for you to go back to the DE2 and Quartus documentation and find the details you need.  Cheers, Dave